TECHNICAL SESSION The era of platform-based SoCs has arrived. By increasing the granularity of pre-integrated and reused IP within an SoC platform, subsystems allow faster design and delivery of platform-based systems. Reusable subsystems represent the next advancement towards ever larger, reusable design functions. However, with each step in the size of reusable blocks, the integration and system verification complexities expand exponentially, from limited parameterization to partial and full programmability.
To realize the benefits of platform-based SoCs, users must be able to develop, optimize, integrate and verify differentiating hardware blocks and the software that defines the final system. Time-to-market and quality are keys to success. Software development and validation must begin on day one to avoid costly schedule delays. Multi-core platforms, with extensible coherent memory, increase the SoC architectural design, integration, verification, and debug challenges. Full system verification and test must begin early in order to adequately test the full breadth and depth of system architecture and performance and deliver the quality that today’s market demands.
In this session, we will cover the process of defining an ARM-based design based on platform subsystem IP, the development and integration of hardware acceleration blocks, analyzing system performance criteria, verification of the SoC functionality, the development and validation of software using virtual prototyping and acceleration technology and verification from block to SoC to full system.