Tuesday, March 24

8:00 AM - 9:00 AM  1 session

  • REGISTRATION
ALL DELEGATES

9:00 AM - 9:10 AM  1 session

  • WELCOME
ALL DELEGATES

9:10 AM - 10:10 AM  1 session

  • Keynote : SECURE SILICON: ENABLER FOR THE INTERNET OF THINGS
Presenter: Dr Walden Rhines, CEO & Chairman of the Board, Mentor Graphics
ALL DELEGATES

10:10 AM - 10:35 AM  1 session

  • MORNING BREAK
ALL DELEGATES

10:35 AM - 11:20 AM  5 sessions

  • Calibre platform for advanced physical verification
Physical Verification (Calibre Platform)
  • Keynote: The Next Big Thing in Test Compression!
Presenter: ThomasRinderknecht, Staff Engineer, D2S DFT R&D Development, Mentor Graphics
DFT (Tessent Product Suite )
  • Delivering SoC Verification in a World of the Internet-of-Things
Functional Verification and Emulation (Questa Verification Platform; Veloce Emulation Platform)
  • Keynote: Achieving Design Effectiveness
Presenter: A.J. Incorvaia, Vice President and General Manager, Board Systems Division, Mentor Graphics
Products: Xpedition VX
PCB System Design (Xpedition Enterprise)
  • Automotive Simulation Platforms
BDA / Vista/ P&R (Olympus-SoC)

11:20 AM - 12:05 PM  5 sessions

  • Verify as you go with Calibre Autofix
Physical Verification (Calibre Platform)
  • DFT Technology Seminar – IJTAG Technology – IEEE 1687 | Enabling the ecosystem from chip to system presented by ASSET InterTech and Mentor Graphics
DFT (Tessent Product Suite )
  • Customer case studies
Functional Verification and Emulation (Questa Verification Platform; Veloce Emulation Platform)
  • Multi-Board System Design with Mentor Graphics Xpedition xSD Systems Designer
PCB System Design (Xpedition Enterprise)
  • Advances in Nanometer Analog/RF/Mixed-Signal Verification
BDA / Vista/ P&R (Olympus-SoC)

12:05 PM - 12:55 PM  5 sessions

  • Working efficiently with the ecosystem of Calibre
Physical Verification (Calibre Platform)
  • ASSET InterTech/Mentor Graphics DFT Technology Seminar - part 2
DFT (Tessent Product Suite )
  • Get Your FPGA Design out of the Lab Faster
Functional Verification and Emulation (Questa Verification Platform; Veloce Emulation Platform)
  • Hyperlynx v9.2  Major Features + case study IAI Elta
PCB System Design (Xpedition Enterprise)
  • Vista: Prototyping and Software Enablement
BDA / Vista/ P&R (Olympus-SoC)

12:55 PM - 1:40 PM  1 session

  • LUNCH
ALL DELEGATES

1:40 PM - 2:25 PM  5 sessions

  • Photonics technology implementation with Calibre & Pyxis
Physical Verification (Calibre Platform)
  • ASSET InterTech/Mentor Graphics DFT Technology Seminar - part 3
DFT (Tessent Product Suite )
  • Technology Innovation in Functional Verification - Challenges and Solutions
Functional Verification and Emulation (Questa Verification Platform; Veloce Emulation Platform)
  • Valor NPI - Integrated DFM
PCB System Design (Xpedition Enterprise)
  • RealTime Designer & Olympus-SoC: Fastest Full Chip RTL Synthesis and Floorplanning
Products: Olympus-SoC
BDA / Vista/ P&R (Olympus-SoC)

2:25 PM - 3:10 PM  5 sessions

  • DFM & Smart Fill for advanced nodes with Calibre
Products: Calibre LFD, Calibre YieldEnhancer, Calibre YieldAnalyzer
Physical Verification (Calibre Platform)
  • Customer Case studies presented by Annapurna Labs and Marvell Semiconductor
DFT (Tessent Product Suite )
  • Making Simulation and DSP algorithm talk
Functional Verification and Emulation (Questa Verification Platform; Veloce Emulation Platform)
  • Virtual Highly Accelerated Lifecycle Testing (HALT) for Increased Reliability
PCB System Design (Xpedition Enterprise)
  • ReqTracer - Safety and Requirements Tracing
Products: ReqTracer
BDA / Vista/ P&R (Olympus-SoC)

3:10 PM - 3:25 PM  1 session

  • AFTERNOON BREAK
ALL DELEGATES

3:25 PM - 3:40 PM  1 session

  • CLOSING COMMENTS
ALL DELEGATES