Sign In
Forgot Password?
Sign In | | Create Account

Tuesday Tech Talks

What do you need to design a chip of 40 billion transistors?

Today's bleeding edge EDA methodologies and tools are likely to be mainstream 8 years from now if they are to be relied on to design chips of 40 billion+ transistors at that time. This is the message Dr. Walden Rhines delivered in his keynotes to 2000+ engineers at 10 venues across Europe and India in the Solution Expo and User2User conference series of 2010.

The 2011 series of Tuesday Tech Talks will educate viewers on new design methodologies and emerging EDA solutions. Each topic in the program was highlighted by Dr. Rhines as a contributor to a 10x productivity gain the IC industry will need if it is to realize chips of 40B transistors. This series dives into four principle areas: high-level system design, verification, embedded software development, and back-end physical design and test.

About Tuesday Tech Talks

Tuesday Tech Talks offer audience participation with the opportunity to ask questions of an industry expert in real-time. You can be sure to hear the answers to challenging questions which will help your understanding of the day's topic.

Tuesday Tech Talks broadcasts every other Tuesday at times convenient for engineers in Europe and India.

  • Europe
    • 09:30 & 14:00 GMT
    • 10:30 & 15:00 CET
    • 11:30 & 16:00 EET
  • India
    • 14:00 & 18.30 IT

Spring 2011 Archives

Saving verification time using TLM modeling

On-demand Web Seminar: Today’s electronic systems embed one or more processors (with software!), bus, cache as well as more and more algorithm mapped in hardware in order to cope with performance requirements. View On-demand Web Seminar

CPU-to-CPU Communications in Multicore Designs

On-demand Web Seminar: Embedded designs incorporating several CPUs - either multiple cores on a chip, multiple chips on a board, or a combination of the two - are becoming increasingly common. It's no secret that software development... View On-demand Web Seminar

Improving System Specification with UML

On-demand Web Seminar: Introduction to UML: This Tuesday Tech Talk gives an overview of UML and how you can use it for specifications. It also considers xtUML and the benefits of using it during specification. View On-demand Web Seminar

Android, Linux and Real-time Development for Embedded Systems

On-demand Web Seminar: Many developers have selected Linux for embedded applications, taking advantage of its open source distribution and the very large range of middleware and drivers that are available. This session considers... View On-demand Web Seminar

System Modeling, Simulation & Analysis - A methodology to develop a reliable system

On-demand Web Seminar: Today’s cross-discipline systems require a highly coordinated development flow and design teams and tool environments must now interact in a multi-discipline, concurrent engineering design process... View On-demand Web Seminar

Advanced Formal Verification

On-demand Web Seminar: In recent years, formal verification has emerged as an alternative approach that addresses the main limitation of simulation-based verification: checking a small fraction of the behaviours of non-trivial... View On-demand Web Seminar

Beyond Physical Verification: Advanced Electrical Rule Checking on Layout

On-demand Web Seminar: As designs incorporate more mixed-signal content, the complexity of checks for issues such as Electrostatic Discharge has increased, and reliance on manual checking and time-consuming simulation becomes... View On-demand Web Seminar

Power Aware Verification

On-demand Web Seminar: Power aware verification checks that the planned active power management architecture and controls will operate correctly and will enable the design to operate correctly as the design transitions from one... View On-demand Web Seminar

Overcoming Complexity in the Physical Verification Signoff Process

On-demand Web Seminar: As we progress to ever smaller nodes, the number of rule checks keeps growing along with the complexity of the rules. Custom and AMS designers are experiencing more and more iterations, slowing down the... View On-demand Web Seminar

Tech Talk Archives

View presentation from past Tech Talk series. Each presentation is presented by an industry expert and lasts between 30-45 minutes.

10X Productivity Gains

CPU-to-CPU Communications in Multicore Designs

Embedded designs incorporating several CPUs - either multiple cores on a chip, multiple chips on a board, or a combination of the two - are becoming increasingly common. It's no secret that software development... View On-demand Web Seminar

Android, Linux and Real-time Development for Embedded Systems

Many developers have selected Linux for embedded applications, taking advantage of its open source distribution and the very large range of middleware and drivers that are available. This session considers... View On-demand Web Seminar

Advanced Formal Verification

In recent years, formal verification has emerged as an alternative approach that addresses the main limitation of simulation-based verification: checking a small fraction of the behaviours of non-trivial... View On-demand Web Seminar

Power Aware Verification

Power aware verification checks that the planned active power management architecture and controls will operate correctly and will enable the design to operate correctly as the design transitions from one... View On-demand Web Seminar

Improving System Specification with UML

Introduction to UML: This Tuesday Tech Talk gives an overview of UML and how you can use it for specifications. It also considers xtUML and the benefits of using it during specification. View On-demand Web Seminar

System Modeling, Simulation & Analysis - A methodology to develop a reliable system

Today’s cross-discipline systems require a highly coordinated development flow and design teams and tool environments must now interact in a multi-discipline, concurrent engineering design process... View On-demand Web Seminar

Beyond Physical Verification: Advanced Electrical Rule Checking on Layout

As designs incorporate more mixed-signal content, the complexity of checks for issues such as Electrostatic Discharge has increased, and reliance on manual checking and time-consuming simulation becomes... View On-demand Web Seminar

Overcoming Complexity in the Physical Verification Signoff Process

As we progress to ever smaller nodes, the number of rule checks keeps growing along with the complexity of the rules. Custom and AMS designers are experiencing more and more iterations, slowing down the... View On-demand Web Seminar

Design for Manufacturing

Curing Reliability Issues at the IC Design Stage

On-demand Web Seminar: This presentation offers an introduction to these problems and explains how advanced EDA tools can help integrate the reliability prediction capability in the design cycle itself. View On-demand Web Seminar

IP Scoring Using TSMC DFM Kits

On-demand Web Seminar: This talk proposes a method of scoring IP from cell to block level for DFM quality which provides a basis for building high DFM quality into your SoC and gaining maximum yield potential. View On-demand Web Seminar

Signoff Physical Verification in the Place and Route Flow

On-demand Web Seminar: This presentation delves into the sources of manufacturing variability, their effect on the traditional design and verification flows, and the emerging EDA solutions that fully integrate the design and... View On-demand Web Seminar

Process Improvement

Safety Critical Systems - Requirements Driven Design

On-demand Web Seminar: How do you know when your design is complete? When your functionality and verification results exactly meet requirements. View On-demand Web Seminar

Low Power

Power-Aware Silicon Test: Understanding Testing and Power-Sensitive Designs

On-demand Web Seminar: During this presentation we discuss the trends, drivers and solutions for power-aware test that have emerged. We will take a look at the technologies where power-aware test required, how designers are looking... View On-demand Web Seminar

How Physical Implementation realizes Power Intent

On-demand Web Seminar: Our discussion will focus on how to handle power intent within a Place and Route environment whilst meeting all design constraints, modes and corners for best QoR. View On-demand Web Seminar

Power Efficient Design Challenges and Trends

On-demand Web Seminar: This presentation covers key aspects to the forces from a technology and market perspective that are driving designers towards better energy efficient designs. View On-demand Web Seminar

Power Aware Verification

On-demand Web Seminar: During this session, we will look at how new standards, verification tools and techniques can be applied to allow low power designs being verified much earlier at the RTL including the software components. View On-demand Web Seminar

2009 Webinars

Easier Debug of Processor-Based Designs

On-demand Web Seminar: During this presentation we will show how to efficiently debug software and hardware together by providing a solution which avoids launching simulation time and time again to figure out what went wrong. View On-demand Web Seminar

Digital IC Test: High Quality Testing requires Test Compression

On-demand Web Seminar: This presentation examines several compression solutions and determines the advantages and limitations of each technology in these areas. View On-demand Web Seminar

Low Pin Count Test with Embedded Compression

On-demand Web Seminar: This event will describe several methodologies that enable designers to reduce the number of pins and top level routing required for the application of high quality test. The focus will be on manufacturing... View On-demand Web Seminar

Verification Strategy for Mixed-Signal SoCs

On-demand Web Seminar: This Technical discussion will look into various tools available for Analog design verification, help understand underlying techniques and how they fit into SoC verification and how to take advantage of... View On-demand Web Seminar

Why is OVM and Hardware Acceleration Such a Viable Solution

On-demand Web Seminar: OVM promotes the use of untimed transaction-based testbenches for simulation and such an approach can be complimentary with hardware acceleration for both high performance and effective creation of system... View On-demand Web Seminar

FPGA Synthesis Techniques for improving Design Performance

On-demand Web Seminar: This webinar will discuss how synthesis technology has evolved to leverage device capabilities and help meet design closure. Topics will include knowing what optimizations to enable and when, physical synthesis... View On-demand Web Seminar

Flexible Technology for Mixed-Signal SoC Verification

On-demand Web Seminar: This webinar will discuss the evolution of digital SoC verification methodology and look at how analog verification can plug into and take advantage of new techniques. It will cover the various verification... View On-demand Web Seminar

What is “Intelligent Testbench Automation”?

On-demand Web Seminar: Discuss the methods behind Mentor’s intelligent testbench automation tool, Questa inFact. It will present how to apply different verification strategies without having to re-write the entire test... View On-demand Web Seminar