What do you need to design a chip of 40 billion transistors?
Delivering 10X Design Improvements
: Time and time again, escalating complexity has threatened to derail the IC industry from the extraordinary 35% annual reduction in transistor pricing it has enjoyed the past 40+ years. Fortunately, in...
Today's bleeding edge EDA methodologies and tools are likely to be mainstream 8 years from now if they are to be relied on to design chips of 40 billion+ transistors at that time. This is the message Dr. Walden Rhines delivered in his keynotes to 2000+ engineers at 10 venues across Europe and India in the Solution Expo and User2User conference series of 2010.
The 2011 series of Tuesday Tech Talks will educate viewers on new design methodologies and emerging EDA solutions. Each topic in the program was highlighted by Dr. Rhines as a contributor to a 10x productivity gain the IC industry will need if it is to realize chips of 40B transistors. This series dives into four principle areas: high-level system design, verification, embedded software development, and back-end physical design and test.
About Tuesday Tech Talks
Tuesday Tech Talks offer audience participation with the opportunity to ask questions of an industry expert in real-time. You can be sure to hear the answers to challenging questions which will help your understanding of the day's topic.
Tuesday Tech Talks broadcasts every other Tuesday at times convenient for engineers in Europe and India.
- 09:30 & 14:00 GMT
- 10:30 & 15:00 CET
- 11:30 & 16:00 EET
- 14:00 & 18.30 IT
Spring 2011 Archives
Tech Talk Archives
View presentation from past Tech Talk series. Each presentation is presented by an industry expert and lasts between 30-45 minutes.