FPGA/PLD

Technical Events:

• SystemVerilog for FPGA Designers Jun 5, 2008 - San Jose, CA
• Multi-FPGA ASIC Prototyping Done Right! May 22, 2008 - San Jose, CA
• EDA Tech Forum (Ottawa) May 22, 2008 - Ottawa, ON

Technical Publications:

• Managing Timing Constraints with Precision Synthesis
• The CHIPit UMRBus Communication System Opens New Ways of Design Verification
• Preserving Freedom of Choice When Designing FPGAs

• Mentor Graphics Names New Vice PresidentApr 24, 2008
• Mentor Graphics Announces Synthesis Support for Xilinx Virtex-5 FXT Field Programmable Gate Arrays Apr 1, 2008
• Mentor Graphics Delivers the Industry’s First Physical Synthesis Solution for Altera Stratix III Device Family Jan 17, 2008