Eldo Simulation
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Duration: 3 Days
Price: 2220 EUR
Course Part Number: 066495
Description
Education Services can help you acquire the skills needed to maximize your usage of Eldo® and realize its full impact on your analog/mixed signal verification process. You will become familiar with tuning your circuit to use the best suited algorithms and accuracy control options, perform measurements on various types of waveforms, choose the most appropriate statistical analyses, perform noise analyses, understand the concepts of optimization, simulate your design taking aging effects. The lecture modules will guide you through the various advanced concepts and tools associated with Eldo .
Detailed lab exercises help reinforce what is discussed during the lectures and provide you with extensive tool usage experience under the guidance of our industry expert instructors.
You will learn how to
- Setup, run simulation and interpret results in the EZwave Waveform Viewer
- Optimize DC convergence
- Tune simulation algorithms and accuracy options
- Use multiple device model libraries, including leading MOS, bipolar and MESFET transistor models as well as Verilog-A behavioral models.
- Control your simulation in many flexible ways
- Extract information from the simulation
- Choose the suitable noise analysis you need for your design
- Perform FFT and Pole Zero analyses
- Simulate in S domain
- Use the most appropriate statistical analysis
- Run Eldo optimizer
- Run DSPF netlist simulation
- Perform ageing simulation through reliability analysis
Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical experience using Eldo.Audience
This course is intended for analog, digital, and mixed-signal designers who want to discover the advantages of the Eldo simulator capabilities.
Prerequisites
- Familiarity with UNIX and Linux operating systems
- Practical experience with analog design and simulation
- Knowledge of principals of SPICE, Familiar with Spice syntax
Key Topics
Introduction to Eldo and its integration into an IC design flow
Overview of ELDO basics
- Running the eldo command
- What’s inside a .chi file
- Arguments of eldo command
EZwave – Waveform viewer
- Basic EZwave features
- Toolbar, Mouse stroke
- Measurement tool
- Waveform Calculator
DC Operating Point
- Performing DC partitioning
- Establishing DC convergence
- Methods to optimize DC convergence
Simulation algorithms and accuracy options
- Choosing the best suited algorithm to solve non-linear equations
- Effective use of integration algorithms
- Tuning accuracy options for effective speed/accuracy trade off
Eldo device models
- Major transistor device models
- Working with model libraries
- Verilog A model instantiation
- Hspice conversion program
- Spectre conversion program
Flexible control of simulation
- Initial condition to improve convergence
- Save/Restart commands
- Large circuit simulation
- Parametric analyses
- Multiple runs simulation
- Miscellaneous commands
- TCL for post processing
Extract and Safe Operating Area
- Define simple extract to get some component data
- Extract in DC domain
- Extract in transient domain
- Re-running an extract without performing a new simulation
- Check when a component is used outside its limits
Noise analyses
- Models and sources
- AC NOISE simulation, specific measurements and noise results analysis
- SST NOISE simulation, specific measurements and noise results analysis
- Transient NOISE simulation, specific measurements and noise results analysis
Pole-zero and FFT analyses
- Pole-zero analysis
- FFT parameters
- Running FFT analysis
- Power Spectral Density
Scattering parameters
- S-Parameters extraction
- Specific S-parameter measurements
- Reusing a S-parameter file
- Mixed-mode S-Parameters simulation
Design Sensitivity and statistics
- Sensitivity Analysis
- Monte-Carlo Analysis
- Worst-Case Analysis
- DC mismatch Analysis
- Screening Analysis
Optimizer
- Running a simple optimization
- Analyzing the optimization results
- Defining design parameters
- Defining objectives
- Defining an optimization
Post-layout simulation with DSPF
- Post layout simulation
- Ignoring some parasitics elements
- Simulation speed improvement
- Simplifying a complex net
- Small components removal
Reliability analysis
- Purpose of the reliability algorithm for ageing simulation
- Advanced reliability analysis setup
- Reliability model compilation
- Performing a reliability analysis (Step 3)
- Reliability results analysis