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ModelSim Advanced Topics
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Perl for EDA
PSL: Assertion Based Verification with Questa
Questa Essentials
Seamless Co-Verification
SystemVerilog for Verification
SystemVerilog Open Verification Methodology (OVM)
Tcl/Tk for EDA
Verilog Fundamentals for SystemVerilog
Verilog Introduction
VHDL Advanced
VHDL Introduction
Cabling and Harness
Capital Analysis Core
Capital Analysis Modeling
Capital Engineer Part 1
Capital Engineer Part 2
Capital FormBoard
Capital FormBoard Plus
Capital Harness XC
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Capital Library
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Logical Cable
VeSys Design
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IC Nanaometer Design
ADiT for Fast-SPICE Simulation
ADVance MS for A/MS Design Verification
Artist Link
Calibre Dense RET
Calibre DFM Yield
Calibre DRC Optimization
Calibre nmDRC/LVS
Calibre RET
Calibre Rule Writing
Calibre TVF
Calibre xL: Parasitic Inductance
Calibre xRC Parasitic Extraction
Design Architect-IC A/MS Simulation Environment
Eldo Simulation
IC Design Flow With ICstudio
IC Station - Accelerating Your Productivity
VHDL-AMS
PCB Systems
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Board Architect Driving PCB Design
Board Station I
Board Station II
Board Station RE
Board Station XE
CES for Board Station Flow
CES for Constraint-Based Design
CES for Expedition PCB (v2005)
CES for Expedition PCB (v2007)
Design Architect
Design Architect/Library Management System
Design Capture for Expedition PCB Layout
DxDesigner 2007 Update
DxDesigner for Expedition PCB Flow (v2005)
DxDesigner for Expedition PCB Flow (v2007)
DxDesigner Schematic to PCB Netlist
DxSim with Eldo
Expedition 2007 Update
Expedition PCB Advanced (v2005)
Expedition PCB Advanced (v2007)
Expedition PCB Introduction (v2005)
Expedition PCB Introduction (v2007)
Expedition PCB: Automation and Scripting (v2005)
Expedition PCB: Automation and Scripting (v2007)
Hyperlynx Signal Integrity Analysis
I/O Designer
ICX Pro Explorer SI Analysis
ICX Training for High-Speed Board Layout
ICX Training for High-Speed Electrical Design
Library Management System
Library Manager for Design Capture to Expedition PCB
Library Manager for Designers
Library Manager: DxDesigner to Expedition (v2005)
Library Manager: DxDesigner to Expedition (v2007)
Signal Integrity and High-speed Methodology
TAU Board Level Timing Analysis
System Modeling
Bridgepoint Application
Bridgepoint Model Compiler
SystemVision Introduction
SystemVision VHDL-AMS Modeling
xtUML Fundamentals
Vehicle Network Design
LIN Target Package (LTP)
Volcano Network Architect
Volcano Overview
Volcano Target Package
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