Intellectual Property

  • Required component of design reuse methodology
  • Highly configurable silicon IP Blocks for industry standard interfaces
  • Encapsulate stringent industry compliance and interoperability standards
  • Soft Digital IP provides configurable RTL (VHDL and Verilog) source code
  • Hard IP provides process specific GDSII layout data
  • IP Blocks include critical design and verification files to drive common tool flows
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