CES for Expedition PCB (v2005)

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Duration:  2 days
Price:  1.300 EUR
Course Part Number:  231516

Description

CES is a Constraint Editor System, for defining and refining design constraints in a common environment that is accessible from many Mentor Graphics Corporation front-end and back-end design systems. This course is designed to cover all the necessary skills required to use CES with Expedition PCB products. If you require training for CES in another environment, see CES for Board Station Flow  in the Related Courses section below.

You will learn how to:

  • Define the main concepts and constraints hierarchy of CES.
  • Enable CES as a constraint system in all of the supported flows.
  • Find and filter data in the design database.
  • Navigate and manipulate the constraints hierarchy.
  • Use the spreadsheets, toolbars, preferences, and options efficiently.
  • Reuse already defined constraints in other designs using Constraint Templates.
  • Partition the design data using Net Classes, Constraint Classes and Schemes.
  • Set up mechanical constraints such as trace widths, via assignments and clearances.
  • Assign physical high-speed constraints including minimum and maximum delays, matched delays, delay formulas, custom and complex topologies, differential pairs, and parallelism rules to nets or group of nets.
  • Auto-route the constrained nets and evaluate the routing results.
  • Define and list the electrical high-speed constraints
  • Set up and simulate nets using ICX Pro Explorer

Hands-On Labs

Throughout this course, extensive hands-on lab exercises provide you with practical experience using CES software. Hands-on lab topics include:

  • Enabling CES and synchronizing databases in the following design flows.
    • Dx Designer to Expedition Flow
    • Design Capture/Design View to Expedition Flow
  • User Interface
    • Customizing the Windows Display
    • Using the CES Browser and the Spreadsheets
    • Editing Data in Spreadsheets     
    • Interfacing with the PCB Data
  • Setting Up Mechanical Constraints
  • Creating Schemes
  • Creating and Populating Net Classes      
  • Setting up Trace and Via Properties        
  • Setting up Clearance Rules
  • Setting up Physical High-Speed Constraints        
  • Creating hierarchy of Constraint Classes
  • Assigning Standard, Custom, and Complex Topologies for a Net
  • Setting up Differential Pair Constraints
  • Setting up Maximum and Minimum delays, delay formulas, and Matched Length groups.    
  • Setting up Parallelism Rules
  • Auto route the nets constrained with both mechanical and high-speed requirements.
  • Setting up and simulating a net
  • Set up models libraries search path.
  • Assign models to components
  • Create simulation settings and stimulus templates
  • Display a net in ICX Pro Explorer and simulate
  • Constraints Reuse
  • Importing Constraint Templates
  • Testing Constraint Templates
  • Assigning Constraint Templates to nets

Audience

  • PCB Design Engineers
  • PCB layout personnel
  • Signal Integrity Engineers
  • Design managers
  • Project Managers
Key Topics
  • CES Overview
  • CES in the flow
  • CES User Interface
  • Net Classes and Schemes
  • Setting up Mechanical Constraints
  • Constraint Classes and Templates
  • Net Properties and Differential Pairs
  • Delays and Parallelism

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