CES for Expedition PCB Web Session

Duration: 3 Half Days
Price: 5,475 SEK (645 EUR)
Course Part Number: 224055

Description

The CES is a Constraint Editor System, which gives you the ability to define and refine design constraints in a common environment that is accessible from many Mentor Graphics Corporation front-end and back-end design systems. This webcast is designed to cover all the necessary skills required to use CES efficiently and effectively in all of the supported design flows. One to two hours of lectures per day followed by independently preformed labs excersises. See FAQ's.

The labs in the course allow you to gain hands-on experience with the tool, defining both mechanical and high-speed constraints to meet today’s challenging PCB designs.

You will learn how to

• Define the main concepts and constraints hierarchy of CES.
• Enable CES as a constraint system in all of the supported flows.
• Find and filter data in the design database.
• Navigate and manipulate the constraints hierarchy.
• Use the spreadsheets, toolbars, preferences, and options efficiently.
• Reuse already defined constraints in other designs using Constraint Templates
• Partition the design data using Net Classes, Constraint Classes and Schemes.
• Set up mechanical constraints such as trace widths, via assignments and clearances.
• Assign high-speed constraints including delays, topologies, differential pairs, and parallelism rules for nets or group of nets
• Auto-route the constrained nets and evaluate the routing results.
• Define and list the electrical high-speed constraints
• Set up and simulate nets using ICX Pro Explorer

Hands-On Labs

Throughout this course, extensive hands-on lab exercises provide you with practical tool usage experience under the guidance of our expert instructors. Hands-on lab topics include:

• Enabling CES and synchronizing databases in the following design flows.
  o DA/BA to Board Station RE Flow
  o Dx Designer to Expedition Flow
  o Design Capture/Design View to Expedition Flow
• User Interface
  o Customizing the Windows Display
  o Using the CES Browser and the Spreadsheets
  o Editing Data in Spreadsheets  
  o Interfacing with the PCB Data
• Constraints Reuse
  o Imorting Constraint Templates
  o Assigning Constraint Templates to nets   
  o Testing Constraint Templates
• Setting Up Mechanical Constraints
  o Creating Schemes
  o Creating and Populating Net Classes  
  o Setting up Trace and Via Properties  
  o Setting up Clearance Rules
• Setting up Physical High-Speed Constraints  
  o Creating Hierarchy of Constraint Classes  
  o Assigning Standard and Custom, and Comples Topologies for a Net
  o Setting up Differential Pair Constraints
  o Setting Up Maximum and Minimum Delays Delay Formulas, and Matched Length Groups
  o Setting up Parallelism Rules 
  o Auto route the nets constrained with both mechanical and high-speed requirements
• Setting up and Simulating a Net
  o Set up models libraries search path
  o Assign models to components
  o Create simulation settings and stimulus templates
  o Display a net in ICX Pro Explorer and simulate

Audience

• PCB Design Engineers
• PCB layout personnel
• Signal Integrity Engineers
• Design managers
• Project Managers

Prerequisites

• This course is for anyone who has worked with constraint-driven high-speed PCB designs. 
• Students should be familiar with at least one of the Mentor Graphics system design flows.
• Familiarity with concepts of Constraint Editor System
• Familiarity with Windows 98, NT, 2000, XP or UNIX operating systems