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PCB Manufacturing, Assembly & Test Blog

Posts tagged with 'data preparation'

31 Oct, 2012

Are you using Stepped Stencils?

Posted by Mark Laing

Mark Laing Hi there We released our Valor MSS Stencil Design module a few months ago and have received positive feedback which resulted in a number of major enhancements that will be part of our up-coming release. However, a topic that I have discussed with a number of our users involves the use of a stepped stencil. Standard stencils have a single thickness across them meaning that paste volume can only be controlled … Read More

stencil, programming, vPlan, data preparation

23 Oct, 2012

Mark Laing Hi there The configuration of SMT lines has changed a number of times over the years. A few years ago lines were configured with a best-in-class requirement, where the line was configured with the chip shooters being supplied from one vendor and the fine pitch machines being from another vendor. In recent years though, may be with the introduction of modular machines and dual line capability, there … Read More

process, programming, BOM, mixed vendor, vPlan, data preparation

2 Oct, 2012

Mark Laing Hi there I spent last week in the wonderful town of Zug about 45 minutes from Zurich in Switzerland. My European colleagues organized a two day seminar for over 60 of our Valor MSS Process Preparation customers at the Siemens facility in Zug. The agenda consisted of some Valor presentations, Valor demostrations of the upcoming software, presentations by actual users of the Process Preparation software … Read More

programming, AVL, process, AOI, data preparation, documentation, Flying Probe, bill of materials, ICT, BOM, Design For Test, vPlan, testability, VPL, stencil

18 Sep, 2012

Test and Inspection Strategies

Posted by Mark Laing

Mark Laing Hi there As a follow up to my posting last week on measuring test coverage, which you can read from the following link: http://www.mentor.com/pcb-manufacturing-assembly/blog/post/how-do-you-measure-test-coverage–77cbb106-851f-4f26-a548-4857098f23d4 I would like to hear from test and process engineers on what types of equipment form part of your test and inspection strategy. How do In-Circuit test … Read More

Design For Test, Flying Probe, AOI, testability, vPlan, ICT, data preparation, BOM, programming, boundary scan

12 Sep, 2012

How do you measure test coverage?

Posted by Mark Laing

Mark Laing Hi there With the Design For Test capability in Valor MSS Process Preparation, read details and see a video by clicking on the following link, we can analyze a board and determine the amount of physical test access to it. http://www.mentor.com/pcb-manufacturing-assembly/solutions/process-prep However the question of how to compare test coverage across multiple boards comes up from customers I talk with. … Read More

data preparation, Design For Test, ICT, Flying Probe

28 Aug, 2012

Mark Laing Hi there Although the Valor MSS Process Preparation solution can handle most types of data that are passed it’s way, intelligent design data brings a wealth of benefits to its users. The import process is typically a few seconds for most designs as opposed to multiple hours to reverse engineer Gerber files to a sufficient level to be useful for manufacturing. Having to support electrical test … Read More

ODB++, bill of materials, documentation, programming, Gerber, BOM, VPL, data preparation, vPlan

15 Aug, 2012

Mark Laing Hi there For the many years I have worked in this industry one of the most common complaints from SMT engineers is related to position and rotation errors that were found during the first article inspection of a PCB during the sticky tape run. The programs would then be tweaked and the sticky tape board ran again to confirm the changes. This resulted in a significant loss of line down time while the … Read More

programming, data preparation, virtual sticky tape, pick and place, vPlan, mixed vendor

7 Aug, 2012

Mark Laing Hi there I have covered a number of areas of process engineering in this blog over the past few months and there is now an opportunity to see how these areas all come together next week in our Webinar titled “World Class Process Preparation”. We will be discussing a number of ways that the users of Valor MSS can streamline their process preparation tasks to make them more efficient and reduce … Read More

Planning, AOI, mixed vendor, BOM, data preparation, documentation, AVL, Flying Probe, bill of materials, ICT, Design For Test, process preparation, vPlan, Webinar, testability, stencil, programming, Sequence

31 Jul, 2012

Mark Laing Hi there This week sees the all new Valor MSS 11.2 version that supports all areas of PCB Process Engineering and Shop Floor. One of the new features of this release is the ability to include Automated Optical Inspection (AOI) machines in-line with the SMT placement machines. This provides the ability to create specific AOI programs depending on where the machine is in the line relative to the point … Read More

data preparation, approved vendor list, vPlan, AOI, BOM, process, AVL, programming, bill of materials

17 Jul, 2012

Mark Laing Hi there One of the least efficient areas in PCB assembly concerns the creation and management of package data that will be consumed across the shop-floor. For example DFM processes rely on accurate package data to determine component to component spacing issues or using accurate pin terminus contact data to ensure that solder joints will form correctly. Accurate package data is critical for DFT analysis … Read More

programming, AOI, bill of materials, mixed vendor, process, data preparation, documentation, Design For Test, Flying Probe, ICT, BOM, VPL, vPlan, stencil, testability

10 Jul, 2012

Mark Laing Hi there Within the Valor MSS Process Preparation suite, we have the best DFA capability that exists in the market. There are a number of checks that are performed that are necessary for PCB assemblers to execute prior to starting a design in production. Being able to know if fiducials on the board are near similar pads or vias is important to ensure that placement and inspection equipment don’t … Read More

Flying Probe, bill of materials, testability, vPlan, ICT, Design For Test, BOM, data preparation

3 Jul, 2012

Mark Laing Hi there One of the largest groups of users within Valor MSS Process Preparation for SMT programming is those supporting ASM, formerly Siemens, pick and place machines. ASM has released their OIB interface as a single API for both programming and monitoring for external applications to use. This has the benefit for third party applications to have an open interface that can be programmed to consistently … Read More

process, programming, data preparation, ASM, SIPLACE, OIB, vPlan, mixed vendor

27 Jun, 2012

Mark Laing Hi there Spreadsheets are probably one of the most useful applications for computers. They were also the “killer app” that allowed computers to take off to the masses. So we have relied more and more on them for every day tasks. One area they are playing a role is in the prioritization of production work orders. It is not uncommon to have to determine which of hundreds of work orders each … Read More

process, Sequence, bill of materials, Planning, vPlan, BOM, data preparation

19 Jun, 2012

Testability versus Accessability

Posted by Mark Laing

Mark Laing Hi there Test Engineers are typically given the requirement to get 100% of nets probed at electrical test with the thinking that this delivers 100% testability. Unfortunately 100% accessibility is not the same as 100% testability. There are a number of reasons why this is not the case but here is a easy one. Typical boards contain integrated circuit (IC) components and power supplies. These power supplies … Read More

programming, data preparation, Design For Test, ICT, testability, Flying Probe

12 Jun, 2012

Mark Laing Hi there When providing accurate Design For Test (DFT) feedback to board designers, individual targets are usually inaccessible for a number of reasons. However, most DFT products only report the first reason a target is inaccessible. So this limited feedback is provided to the designer who corrects that single problem, only to find that when the analysis is run again on the new layout another reason … Read More

data preparation, Flying Probe, programming, ICT, Design For Test, vPlan

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