PCB Manufacturing, Assembly & Test Blog

Posts tagged with 'Design For Test'

10 Jul, 2012

Mark Laing Hi there Within the Valor MSS Process Preparation suite, we have the best DFA capability that exists in the market. There are a number of checks that are performed that are necessary for PCB assemblers to execute prior to starting a design in production. Being able to know if fiducials on the board are near similar pads or vias is important to ensure that placement and inspection equipment don’t … Read More

Flying Probe, bill of materials, testability, vPlan, ICT, Design For Test, BOM, data preparation

19 Jun, 2012

Testability versus Accessability

Posted by Mark Laing

Mark Laing Hi there Test Engineers are typically given the requirement to get 100% of nets probed at electrical test with the thinking that this delivers 100% testability. Unfortunately 100% accessibility is not the same as 100% testability. There are a number of reasons why this is not the case but here is a easy one. Typical boards contain integrated circuit (IC) components and power supplies. These power supplies … Read More

programming, data preparation, Design For Test, ICT, testability, Flying Probe

12 Jun, 2012

Mark Laing Hi there When providing accurate Design For Test (DFT) feedback to board designers, individual targets are usually inaccessible for a number of reasons. However, most DFT products only report the first reason a target is inaccessible. So this limited feedback is provided to the designer who corrects that single problem, only to find that when the analysis is run again on the new layout another reason … Read More

data preparation, Flying Probe, programming, ICT, Design For Test, vPlan

6 Jun, 2012

Hot and humid in Israel

Posted by Mark Laing

Mark Laing Dear all It has been a few months but this week I am out at the Mentor Graphics office in Yavne, Israel. I have been working with the R&D team out here on the upcoming versions of our Process Engineering solutions. I certainly appreciate people taking the time to respond to my blog last week on stencil apertures. The new area ratio report as discussed in last week’s blog will be part of the … Read More

VPL, BOM, programming, stencil, AOI, data preparation, Planning, Design For Test, Enhancement, documentation, Flying Probe, vPlan

24 Sep, 2011

Mark Laing Another area I discussed in my recent article for PCB007 was with Design For Test or DFT. Ensuring that accurate test or inspection techniques have been catered for before a layout is signed off will ensure that any assembly or component issues will be found as early as possible in the manufacturing process. For each additional step during the manufacturing process it is estimated that the cost of corrective … Read More

boundary scan, Design For Test, ICT, Flying Probe

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