For over 50 years, designers have been calculating current-carrying capacity on PCBs using charts created by the Navy in 1956 (more specifically NBS (National Bureau of Standards) Report #4283 “Characterization of Metal-insulator Laminates”, D.S. Hoynes, May 1, 1956. Commissioned by Navy Bureau of Ships). These charts are still in use today; many designers have probably seen them in the IPC-221 spec. The problem with using these charts is that they are based upon fixed-width conductors in a specific set of environmental conditions. The newly released standard pertaining to current-carrying capacity, IPC-2152, has expanded the number of charts to include different scenarios. However, even the IPC-2152 spec advocates simulation as the most accurate means of predicting current-carrying capacity.
The issue has to do with a number of factors, including the co-dependence of current and temperature. As the current through a conductor increases, so does the temperature in that conductor. Since temperature affects conductivity, it will also affect the current through a given conductor size. This co-dependence spawns the need for co-simulation between power integrity and thermal analysis. Such analysis can also take into account the complicated, non-uniform shapes that are used to carry current in most modern PCBs, including the non-uniformity of current distribution as well as temperature distribution.
To find out more, take a look at my recent article on the subject in Printed Circuit Design and Manufacture Magazine: