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PCB Design Blog

Posts tagged with '3DEM simulation'

31 Jan, 2013

Dave Kohlmeier

Over the past 16 years I’ve had the pleasure of being part of the development of HyperLynx and am excited about the latest release, HyperLynx 9.0 as we are simultaneously celebrating its 25th birthday and 10th year with Mentor Graphics. HyperLynx was founded in 1988 when cell phones were the size of a lunch box, FPGAs were just hitting the streets with a Xilinx 2064 touting 64 logic cells, VHDL and

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Power Integrity, 3DEM simulation, Signal Integrity

11 Jul, 2012

Zhen Mu

  Designers dealing with SERDES channels pay more and more attention to signal via effects. Many literatures and guidelines talk about the approaches to correctly configure vias so that via effects on signals can be minimized. Such methods require detailed analysis of single via or differential via pair. With the help of accurate 3D field solvers, vias can be designed to have controlled noise in channels

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3DEM simulation, SERDES


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