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PCB Design Blog

Posts tagged with 'S-parameter'

6 Mar, 2012

Put the Pieces in Place for SERDES Success

Posted by Patrick Carrier

Patrick Carrier

Interconnect loss modeling?  Check.  Signal conditioning modeling?  Check.  Ability to simulate multiple S-parameter models for things like connectors and packages and vias correctly in the time domain?  Oooh…. that’s a tough one.  Check! Ability to include all sources of deterministic and random jitter, worst-case bit patterns, and worst-case crosstalk in the analysis?  Wow!  Check. 3D

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S-parameter, crosstalk, SERDES


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