High Speed Digital & Mixed Analog-Digital System Designers
This is a one day "how to do it right the first time" class for EE's and CAD Layout Designers who need to build digital / digital-analog systems that are functional, reliable and quiet.
"Right the First Time" designs require knowledge, planning, and analysis. As a result you can save the aggravation of multiple board spins that blow through both budgets and contract delivery dates.
What You Will Learn
- PCB Stack-up .... What is a good high speed stack-up and why?
- Understanding Routing Topology & Termination for:
- SDRAM / DDR2/3..Single ended signaling (Busses, Clocks, & Strobes)
- LVDS differential signaling vs true differential signaling
- SERDES (PCI Express, XAUI, etc)
- Building a Quiet Power Delivery Network
- How do planes, capacitors, and capacitor mounting choices effect
- Power Delivery Impedance, Driver & Receiver Performance, and Ground Plane Noise
- Eliminate EMI Issues by understanding how:
- Proper Signal Integrity and Power Integrity design minimizes noise creation
- Proper Component Placement and Routing eliminates antennae creation
- Proper I/O filtering to keeps noise off I/O leads
- Proper I/O shielding works to eliminate noise from differential I/O signals
- Create Solid Analog Digital Systems that maximize isolation while maintaining quiet high speed communications
- Learn the Basic Theory of Electric & Magnetic Shielding. Don't complain that it does not work if you don't understand how it works.
Who Should Attend
- PCB Designers
- Engineering Managers
- Design Engineers
Exhaustive PCB Performance Verification: Are You a Rev. C Company?
Electronic designs have become so complex, and operate at such extreme clock speeds that manual checking PCB designs for electrical rule compliance is just about impossible. While manual checks can reveal...
The Need for Speed and Accuracy: Techniques and Tools for Modern Signal-Integrity Analysis
This session will discuss the advanced techniques required for modern SI analysis, ranging from high-throughput batch simulation of memory interfaces to IBIS-AMI modeling of SERDES channels to 3D-electromagnetic...
Analyzing DDR2/3/4 Memory Interfaces: Guarantee Your Margins Before You Build and Ship Boards
This session will explain the use of HyperLynx’s DDRx Wizard, and preview its upcoming support for the new DDR4 standard.