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Overview

This is a practical workshop during which you shall apply the theory presented by the instructor on a sample design, thus learning how to use a signal integrity simulator to validate your designs in a virtual environment.

It is meant as an introduction to signal integrity analysis, a foundation on which you may further build your SI expertise.

Whether you are a beginner in signal integrity analysis or have already designed high-speed PCBs, but using only reference designs, rules-of-thumb and your experience, then you should attend this workshop. If you already are an expert, frequently using SI simulators, then this workshop is not for you (except if you want to compare HyperLynx to your current SI tool).

The language of the workshop is English.

All participants to this workshop will have the option to purchase a license of PADS ES at a discounted price, within 60 days after the event.

There is registration fee of 50 euros or 270 lei (depending on location) for this event; we shall contact you to arrange payment, after receiving your registration.

What You Will Learn

  • SI Introduction
  • Transmission Lines
  • Termination
  • Crosstalk
  • DDR interfaces
  • Designing with Serializers/Deserializers (SerDes)

About the Presenters

Presenter Image Catalin Iov

Catalin is an electronics engineering graduate from the Technical University of Iasi and has a PhD degree in electronics from the same university. He has more than 10 years experience as PCB designer.

At TRIAS, he is Technical Marketing Engineer, responsible with our products for PCB design, simulation and verification.

Presenter Image Steve Gascoigne

Steve Gascoigne received his EE in Electronics from Exeter University. He has 25 years in the electronics industry, including 14 years as a hardware engineer and PCB designer at Plessey and Nortel networks, and 11 years as a field applications engineer.

Who Should Attend

  • Hardware Designers who want to avoid or overcome signal integrity problems on PCBs
  • Technical Managers who want to understand the benefits of validating PCBs in a virtual environment

Agenda

  • The workshop starts at 08:30, with registration and welcome coffee, and ends at 16:00.
 
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