An Integrated Design Flow for FPGA/PCB Co-Design
On-demand Web Seminar
While FPGA pin assignment closure is seen as a painful and time consuming process by many, adoption of the right methodology can not only shorten project schedule but also differentiate your product. This demonstration will show to accelerate your FPGA-PCB system co-design process with the Mentor Graphics Precision Synthesis - Xpedition design flow.
This demonstration will show how to accelerate your FPGA-PCB system co-design process with the Mentor Graphics Precision Synthesis - Xpedition design flow.
While FPGA pin assignment closure is seen as a painful and time consuming process by many, adoption of the right methodology can not only shorten project schedule but also differentiate your product.
What You Will Learn
- How to implement advanced IO optimization to save time and eliminate manual errors
- How to use pin-aware physical synthesis for FPGA timing closure
- How FPGA and PCB designers can meet design constraints in parallel
About the Presenters
Roger Do is Synthesis Product Specialist at Mentor Graphics. He has over 16 years of FPGA experience, including previous roles in corporate and field applications and product marketing with Texas Instruments, Lucent Technologies, and Lattice Semiconductor. Roger holds a B.S. in Electrical Engineering from Texas A&M University.
Dave Brady is the Business Development Manager in the Board System Division at Mentor Graphics. Dave’s focus is accelerating PCB design creation processes. Dave has been with Mentor Graphics for 20+ years and has worked to develop and promote ASIC, FPGA and PCB design solutions. Before joining Mentor Graphics Dave was an application engineer for one of the original synthesis tool developers: Trimeter Technologies. Dave began his career with the Northrop Research and Development Center focusing on custom IC design.
Daniel Platzker is the product line director for FPGA synthesis in Mentor Graphics design creation and synthesis division. Over the last 20 years, Daniel has held executive positions in marketing, engineering, sales and operations in several high-tech organizations, including the Israeli Department of Defense, Daisy, Tegrity, Castelle and BackWeb. Daniel holds patents in image processing applications and is a winner of the prestigious Israeli Prime Minister Award for product innovation.
Who Should View
- FPGA design engineers
- PCB designers
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Other Related Resources
Success Story: Agilent reduced typical 4-8 week times to layout one FPGA to 1-2 weeks using Xpedition's FPGA I/O optimization.…View Success Story
Success Story: Broadcom uses FPGA I/O optimization to develop PCB with multiple FPGAs and beats the project schedule by 66%.…View Success Story