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Reduce Design Time and PCB Manufacturing Costs with FPGA-PCB Optimization



This session discusses customer implementation of advanced optimization technologies for single- and multiple-FPGA boards to accelerate time to market while minimizing PCB manufacturing costs.

FPGA on PCB implementations are evolving as ever-increasing integrated circuit density and performance are pushing greater system functionality on-chip and moving signaling interfaces to the device pins on 1000+ pin BGA packages. The flexibility of programmable drive standards and pin selection on hundreds of user I/O's with dozens of signaling technologies has increased complexity of the FPGA- PCB integration process.

What You Will Learn

  • Challenges faced and savings achieved through concurrent FPGA/PCB optimization
  • Interface to FPGA design and 'what if' device/pin selection to vendor electrical and logical rules
  • Automated pin unraveling to untangle pin assignments to critical PCB interface components/connectors and between multiple FPGAs

About the Presenter

Presenter Image Frank Smetana

Frank is currently managing market development for FPGA-on-PCB Solutions. Frank originally worked at Mentor Graphics as a Field Applications Engineer for eight years supporting implementations at printed circuit board customer sites. He has also has been involved in customer ASIC and FPGA implementations through account management roles at Synopsys and Synplicity. Frank holds a BSEE from the University of Illinois at Urbana-Champaign and an MSEE from the Illinois Institute of Technology.

Who Should View

  • Engineering Managers
  • FPGA Designers
  • PCB Designers
  • Project Managers

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