This document describes of the advantages of deploying HyperLynx to meet the increasingly complex challenges of high speed channel design. An overview is provided of the advanced analysis technology. Finally two case studies are presented exploring the sensitivity of channel design to two design trade-offs: via back-drilling and trace length imbalance.
The design of high performance multi-Gbps channels inevitably requires facing new challenges. One possible approach is to attempt to blindly apply conservative layout guidelines that have been established by the success of previous designs or have been provided in the form of reference designs from an IC vendor. This methodology has merit, but will tend to result in designs that have mediocre performance and require unnecessarily expensive PCB materials and manufacturing processes and/or over-constrain the layout engineer placing components and routing the PCB. An alternative approach that will reduce cost and allow maximum performance is to develop knowledge of how physical design rules affect electrical performance so that appropriate tradeoffs can be applied.
HyperLynx GHz provides an intuitive but powerful suite of tools that allows every member of the high speed serial channel design team to participate in creating the highest quality design while minimizing manufacturing costs. HyperLynx GHz also provides the post layout analysis tools that allow the team to ensure design goals have been met and that the product will operate reliably under field conditions.