Mentor Graphics Announces Improved Performance and Advanced At-Speed Capabilities in FastScan for Testing Nanometer Designs

WILSONVILLE, Ore., September 22, 2003 - Mentor Graphics Corporation today announced the availability of improved performance and advanced at-speed test capabilities in its industry-leading FastScanTM automatic test pattern generation (ATPG) tool.  These enhanced at-speed test capabilities improve defect detection for nanometer designs, allowing customers to improve the quality of test for their complex integrated circuits (ICs).  Working closely with Mentor Graphics to define and validate the new at-speed test capabilities, Motorola is now using them to successfully test the MPC74xx family of PowerPC processors.

"At-speed testing plays an integral role in our test strategy.  The enhancements made to the at-speed test capabilities in the FastScan tool enabled us to significantly reduce pattern count while improving scan-based test coverage on our high-performance PowerPC processors," said Raj Raina, Manager of Design Technology & Standards for Network & Communications Systems Group of Motorola's Semiconductor Products Sector.  "Pattern generation time was reduced from weeks to days and the user-defined capture procedures facilitated accurate at-speed testing using the device's on-chip clocks. We are now testing the core at 25 times the maximum speed of the test equipment, with no additional requirements placed on the tester itself."

As process technologies move to 130 nanometers and below, speed-related defects that are not detected using traditional test methods are becoming more prevalent.  As a result, the use of advanced at-speed test methodologies has become a requirement.  At-speed testing offers improved detection of speed-related defects but the creation of at-speed patterns can be a complex process. The FastScan tool automates the at-speed pattern generation process while the tool's enhanced compression and optimization capabilities significantly reduce the amount of test data required for these additional tests.  The latest version of the FastScan tool also offers up to a ten-fold improvement in ATPG performance, reducing at-speed pattern generation run times from days to hours.

New tool capabilities include:

  • User-defined capture procedures - The user-defined capture feature enables users to define the allowable clocking sequences for their designs. These clock sequences are then used during ATPG to ensure that all at-speed tests follow only the legal clock sequences.  Capture procedures can also define internally generated clocks, thus allowing the at-speed test to use the IC's internal clock sources for a more accurate test.
  • Accurate at-speed fault simulation - A capability unique to the FastScan tool, improved fault simulation accurately grades at-speed test coverage to ensure users get an accurate measure of at-speed coverage.
  • Improved performance - To ensure at-speed patterns are created in an efficient manner, dramatic performance improvements were made to the FastScan tool which improve pattern generation performance by up to 10X on some designs, reducing processing times from weeks to days and, in some cases, hours.
  • Diagnostics for at-speed patterns - Scan-based diagnostics play an increasingly crucial role in failure analysis as well as yield improvement and ramp-up.  The FastScan Diagnostics were enhanced to support defect diagnostics and isolation for at-speed transition patterns.
  • "Semiconductor manufacturers are having to rethink their test strategies to ensure high product quality as nanometer process technologies become a reality," said Robert Hum, vice president and general manager of the Design Verification and Test division for Mentor Graphics.  "By working with customers like Motorola, we are able to develop the advanced technologies the industry needs to maintain test quality and acceptable defect rates at these smaller geometries, as well as provide the capabilities within the tools that allow them to perform more efficiently."

Pricing and availability
The FastScan tool's advanced at-speed capabilities are included in the current release, available now to current customers at no extra charge.  The FastScan tool lists for $92,400 for a perpetual license.  For more information, contact your local sales office or email dft_info@mentor.com.

About Mentor Graphics Design-for-Test Tools
Mentor Graphics provides the industry's broadest portfolio of DFT solutions for testing today's System-on-Chip and deep submicron designs, including integrated solutions for scan, ATPG, embedded deterministic test, advanced memory test, boundary scan, logic built-in self-test and a variety of DFT-related flows.  For more information visit www.mentor.com/dft.

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $650 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.


Mentor Graphics is a registered trademark and FastScan is a trademark of Mentor Graphics Corporation.  All other company or product names are the registered trademarks or trademarks of their respective owners.

###

 

For more information, please contact:
Leanne White
Mentor Graphics
503.685.1984
leanne_white@mentor.com		Suzanne Graham
Mentor Graphics
503.685.7789
suzanne_graham@mentor.com
 
 
© Mentor Graphics Corp. All rights reserved.