Procket Networks Standardizes on Mentor Graphics FastScan

WILSONVILLE, Ore., September 22, 2003 - Mentor Graphics Corporation today announced that Procket Networks, Inc. has standardized on the Mentor Graphics industry-leading FastScan™ automatic test pattern generation (ATPG) tool for development of its multi-million gate system-on-chip (SoC) designs.  Utilizing the latest improvements in the FastScan tool, Procket realized a 10X improvement in performance as well as a 20 percent reduction in pattern count on its latest 17 million gate design, for its industry-leading Very Large Scale Integration (VLSI) technology.

As a leader in Internet Protocol (IP) networking solutions, Procket Networks has designed and developed some of the most advanced integrated circuits in the networking industry for its PRO/8000 series of routers.  The ability to generate high-coverage test patterns on designs exceeding 15 million gates is critical to the company's success.

"As a supplier of sophisticated networking solutions, we rely on the most advanced design automation tools to produce the large and complex designs that power them," said Jeff Purnell, vice president of engineering, Procket Networks.  "The performance improvements Mentor Graphics has made to its FastScan tool have allowed us to reduce run times from weeks to days, and in some cases, from days to hours.  At the same time, we also realized a significant reduction in pattern count.  To meet the stringent quality and reliability requirements of our systems, Procket Networks employs a robust test suite of Path Delay and Transition Fault vectors for speed testing.  Mentor was extremely responsive to our needs in developing these tests, and made significant improvements in the generation of test vectors.  As we move to our next generation VLSI design - our biggest design yet at 40 million gates - the FastScan tool will play a crucial role in helping us meet our time to market, cost and quality goals."

The new release of FastScan features innovative ATPG algorithms that optimize compressed pattern generation for multi-million gate designs.  Significant enhancements were also made to the netlist flattener to improve both capacity, or memory usage, and initial design loading and design rule checking (DRC) performance.  The new ATPG algorithms improve test pattern generation performance on average by a factor of 10 on a single CPU.  These new algorithms also provide an added benefit of reducing test pattern count on most designs.  These enhancements ultimately enhance Mentor's embedded deterministic test solution (EDT^TM), TestKompress?, as all FastScan functionality is folded into the TestKompress product.

"The ongoing industry problems of shrinking design sizes and increasing complexity are causing a discontinuity for current test methodologies and putting product quality in jeopardy," said Robert Hum, vice president and general manager of the Design Verification and Test division for Mentor Graphics.  "As the leader in ATPG technologies, we are continually investing in R&D to deliver the solutions our customers need to meet their test objectives."

Availability
The FastScan performance improvements are included in the current tool release, available now to current customers at no extra charge. For more information, contact your local sales office or email dft_info@mentor.com.

About Mentor Graphics Design-for-Test Tools
Mentor Graphics provides the industry's broadest portfolio of DFT solutions for today's System-on-Chip and deep submicron designs, including integrated solutions for scan, ATPG, EDT, advanced memory test, boundary scan, logic BIST and a variety of DFT-related flows.  For more information visit www.mentor.com/products/dft.

About Procket Networks, Inc.
Procket Networks, Inc. offers a range of breakthrough technology and platforms that enable customers to achieve maximum reliability and value from their IP networks. Our products combine the industry's most advanced software and network processor technologies with true innovations in customer support. Procket empowers customers to focus on building successful businesses rather than troubleshooting their networks. For more information, contact Procket Networks at 408.635.7900.

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $650 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics and TestKompress are registered trademarks and FastScan and EDT are trademarks of Mentor Graphics Corporation.  All other company or product names are the registered trademarks or trademarks of their respective owners.

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For more information, please contact:
Leanne White Mentor Graphics 503.685.1984 leanne_white@mentor.com	Suzanne Graham Mentor Graphics 503.685.7789 suzanne_graham@mentor.com