Nucleus OS Support for MIPS Processor Family

MIPSMentor Graphic’s Nucleus Real Time Operating System (Nucleus RTOS) was designed exclusively for real time performance, small footprint and minimal memory consumption. The Nucleus OS has been ported to hundreds of different processors, across various architectures, and is prevalent in many MIPS32 4Kc, MIPS32 24Kc, MIPS32 74Kc processor solutions today.

MIPS architecture is a true RISC-based architecture that is suitable for myriad of embedded applications. Low power consumption and heat characteristics of embedded MIPS implementations coupled with knowledge of the architecture and wide availability of embedded tools makes it an ideal choice for computer networking/communication applications, arcade and console based video games, printers, digital television sets and other consumer electronic devices.

Current Nucleus OS support for MIPS processor family includes: MIPS32 4Kc, MIPS32 24Kc and MIPS32 74Kc processor cores.

Summary for MIPS32 4Kc Architecture and Nucleus RTOS Support

  • All MIPS II instructions, with special Multiply-Accumulate (MAC)
  • Support for the MIPS16e Application Specific Extension
  • MMU that contains 3-entry instruction and data TLB, and a dual-entry joint TLB.
  • High performance Multiply/Divide Unit (MDU).
  • Instruction and data level-one caches configurable from 0-16 KB in size.
  • Optional EJTAG.
  • Hand-held devices
  • Industrial control systems
  • Medical
  • Consumer electronics

The following Nucleus RTOS services are available

  • Kernels
  • Networking
  • User Interface (UI)
  • Multimedia
  • USB
  • Storage & Database
  • MIPS Technologies
  • National Electronics Corp.

Summary for MIPS32 24Kc Architecture and Nucleus RTOS Support

  • 8-stage pipeline
  • Support for the MIPS16e Application Specific Extension
  • MMU that contains 4-entry instruction and 8-entry data TLB, and a configurable 16/32/64 dual-entry joint TLB.
  • High performance Multiply/Divide Unit (MDU).
  • Instruction and data level-one caches configurable at 0, 16, 32 and 64KB in size.
  • The Bus Interface Unit implements Open Core Protocol for SOC designers.
  • EJTAG 3.10.
  • Hand-held devices
  • Industrial control systems
  • Medical
  • Consumer electronics

The following Nucleus RTOS services are available

  • Kernels
  • Networking
  • User Interface (UI)
  • Multimedia
  • USB
  • Storage & Database

MIPS Technologies

Summary for MIPS32 74Kc Architecture and Nucleus RTOS Support

  • Out-of-order execution pipeline
  • Implements MIPS DSP ASE – Revision 2.0, and MIPS 16e ASE.
  • L1 instruction cache configurable at 16, 32, 64KB, and data cache configurable at 0, 16, 32 or 64KB.
  • High performance Multiply/Divide Unit (MDU).
  • The Bus Interface Unit implements Open Core Protocol for SOC designers.
  • EJTAG 3.10.
  • Hand-held devices
  • Industrial control systems
  • Medical
  • Consumer electronics

The following Nucleus RTOS services are available

  • Kernels
  • Networking
  • User Interface (UI)
  • Multimedia
  • USB
  • Storage & Database

MIPS Technologies

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