Electronic System Level Design
Achieving Optimal Designs through ESL Methodologies
Today’s advanced designs have grown too massive and complex to cost-effectively design and verify using traditional RTL methodologies alone. Electronic System Level (ESL) design methodologies address this complexity problem by elevating design to a higher level of abstraction. This relieves hardware designers from the design errors caused by the overwhelming detail of lower-level methodologies and offers much shorter and efficient design cycles.
Full-Chip High-Level Synthesis
Catapult C Synthesis now delivers the first unified solution that lets designers model, verify, and synthesize complex mixes of control and algorithmic units from a single ANSI C++ source. Combined with its new low-power optimizations, Catapult takes high-level synthesis to a new level and opens the way to true full-chip synthesis. Learn more about Catapult C Synthesis
ESL Design Tasks
ESL Design and Verification
Mentor provides ESL tools and methodologies that can be deployed to architect and validate hardware and software, ensuring an optimal system is built correctly the first time. Learn More
High Level Synthesis
As design complexity pushes traditional RTL design and verification to their limits, High Level Synthesis reduces the manual effort required to create and verify synthesizable RTL code. Learn More
- Product Demo: Catapult C Synthesis Demo
ESL Design Resources
Transaction Level Modeling
Transaction level modeling (TLM) provides an abstract design methodology supporting modeling, validation analysis and implementation processes. TLM is one of the key ESL concepts that allows modeling communication at a higher level while abstracting hardware signals, cycles and data structures. More
Partners and Standards
Partnering with a variety of different silicon vendor and flow partners allows Catapult C Synthesis to be used by ASIC and FPGA hardware designers in today’s leading wireless, video, and image processing applications. More
Catapult Industry Solutions
Catapult C broadband wireless, video, image processing solutions. More
Training
The courses have been tailored for audiences with varying backgrounds - from algorithm research and implementation teams to production quality hardware design teams.
- Catapult C
- C++ for Hardware Design
- C++ Coding Guidelines for Catapult C
From the Blogs
Tweeting about Control-Logic HLS
The many man years of effort we have invested in the newly announced Catapult technology can hardly be summarized in a simple press release. We expect that the true novelty of the Catapult approach for…View Blog Post
News & Press
- Mentor Graphics Extends Catapult C with Support for Control Logic to Enable Full-Chip High-Level Synthesis
- Mentor Graphics Extends High Level Synthesis Leadership with Acquisition of Agility Design Solutions Inc. C Synthesis Suite
- Mentor Graphics Announces Scalable TLM-2.0 Design Flow Using Vista and Catapult C Synthesis Electronic System Level (ESL) Design Tools
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