ESL Symposium at DAC: ESL Driving Forces: The Art of Architecture Design and Verification
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Overview
In the semiconductor industry, companies face daunting challenges every day. Whether it's adopting new technologies, targeting emerging end-user markets or simply delivering on an aggressive product schedule, the dynamics of this industry come down to embracing change and innovation.
Join us for this insightful panel discussion on the driving forces in ESL design moderated by Walden C. Rhines, CEO Mentor Graphics.
Date: Wednesday, July 29
Time: Noon until 2PM
Location: 46th DAC at Mascone Convention Center, Gateway Ballroom #102, San Francisco, California
Topics
- Present and future challenges in an architecture design and verification process
- Future architecture requirements, such as multi-core platforms, and how they change ESL tool capabilities
- The role of high-level synthesis in bridging the gap between architectural design and RTL
- The impact of embedded software in the process of architectural design and verification
Please register today to reserve your seat and free lunch. Flip minoHD door prize drawing for attendees.
Free lunch!
Door prize drawing
About the Presenter
Dr. Walden C. Rhines
Walden C. Rhines is Chairman and Chief Executive Officer of Mentor Graphics, a leader in worldwide electronic design automation with revenue of $789 million in 2008. During his tenure at Mentor Graphics, revenue has more than doubled, growth rate since 1999 has been number one among the “Big 3” EDA companies and Mentor has grown the industry’s number one market share solutions in physical verification, design concept-through-functional verification and printed circuit board design.
Who Should Attend
- System Engineers
- Engineering Management
- Engineers
- Project Managers
Panelists
- Global Unichip, Alan Su
- Mentor Graphics, Simon Bloch
- ST Microelectronics, Nitin Chawla
- Synopsys, Joachim Kunkel
- University of Tubingen, Germany, Wolfgang Rosenstiel
- Xtreme-EDA, David Black
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