Catapult Synthesis
Catapult is for ASIC and FPGA hardware designers of portable wireless, video, and image processing equipment who need to deliver optimal implementations with aggressive time-to-market requirements. Catapult is a high-level synthesis tool that uses industry-standard ANSI C++ to generate correct-by-construction, high-quality RTL 10-100x faster than other methods. Unlike traditional RTL design methodologies, Catapult enables the designer to pick the best architecture for given performance/area/power requirement and avoids the design errors introduced from hand coding the RTL description.
Benefits
- Pure ANSI C++ Synthesis with SystemC Verification
- Create optimal DSP hardware designs 10-100x faster than hand-coded methodologies
- Incremental refinement methodology enables maximum user control
- Automatically synthesize interface hardware
- Ease verification through automatic SystemC transaction level model (TLM) and testbench generation
- Production proven: 36 ASIC tapeouts and 100+ FPGA designs completed