Using High-Level Synthesis for FPGA Development

Next generation communication systems (Super 3G, WiMAX, etc.) will enable telecommunications carriers to deliver enhanced multimedia services at super-high-speeds. However, designing the hardware to support these systems has become more and more complicated. To implement these demands into an ASIC or FPGA, one must consider tradeoffs between design time, the size of the silicon implementation, and performance of the final system. Even more challenging, one must complete these larger, more complex designs faster to meet their tight time-tomarket windows. Thus, we have to introduce a new design methodology such as C-Based design.