Mentor.com :: FPGA Resources

On-demand Web Seminar:Safety-critical Applications and xtUML

Tue, 05 Feb 2013 18:39:01 GMT

Interest in adopting modeling practices is very high in domains requiring safety-critical design practices. In this presentation, the capabilities of BridgePoint and ReqTracer, two products from Mentor Graphics, are combined to implement a requirements-driven xtUML process that satisfies the requirements, verification, and code-quality needs of the safety-critical design community.

On-demand Web Seminar:Explore the True Potential of Your FPGA Design

Wed, 07 Nov 2012 18:22:27 GMT

In this seminar, you’ll discover how to leverage FPGA Precision Synthesis technology to find the true potential of your design.

Blog Post:OVM Gets Connected

Dennis Brophy — Mon, 10 Sep 2012 15:00:27 GMT

OVM Bridges SystemVerilog and SystemC Languages When UVM Connect was first released, the multilingual connection between IEEE Std. 1800™ (SystemVerilog) and IEEE Std. 1666™ (SystemC) standards bridged the two languages to allow design and verification engineers to access UVM from SystemC or SystemVerilog to exploit native languages advantages. OVM users wondered if it was possible to support them as

Blog Post:The floating point argument

Colin Walls — Mon, 10 Sep 2012 15:00:04 GMT

I am on vacation and, all being well, by the time this posting goes live, I will be sunning myself on a Greek island. A couple of weeks ago, I posted a blog about the use of floating point. My colleague Brooks Moses [who did a guest blog post a while back] made a comment on that posting, pointing out that I had over-simplified my example. I am always happy to get such feedback. It transpired that Brooks

Blog Post:Open Stand & EDA Standardization

Dennis Brophy — Wed, 29 Aug 2012 05:18:31 GMT

Five Leading Global Organizations Affirm “The Modern Paradigm for Standards” The EDA industry has seen changes to the international standards paradigm the past few decades. When industry helped launch VHDL with the help of government support, it transferred ongoing maintenance and enhancement to the IEEE when it completed its first version. In addition to anchoring the standard at the IEEE,

Success Story:First time’s a charm for FPGA verification at Lockheed Martin Space Systems Company

Tue, 26 Jun 2012 16:59:58 GMT

Lockheed Martin uses SystemVerilog, OVM and Mentor Graphics tools for first-pass FPGA verification success

Multisession Event:Mentor Forum Finland

Wed, 20 Jun 2012 21:20:00 GMT

Mentor's Forum provides this opportunity, bringing together EDA industry experts, the EE design community, and solution providers – to collectively address the hottest issues, trends and products that affect the EDA industry.

Software Evaluation:ModelSim PE Simulation Download and Trial

Thu, 10 May 2012 07:00:00 GMT

Now is your opportunity for a risk free 21-day trial of the industry’s leading simulator with full mixed language support for VHDL, Verilog and SystemVerilog and a comprehensive debug environment include code coverage. ModelSim PE, act now – download and receive a 21-day license instantly.

Industry Article:Six Ways Synthesis Can Support Design Assurance in FPGAs

Wed, 18 Jan 2012 08:00:00 GMT

On-demand Web Seminar:ReqTracer + HDL Designer for Medical Applications

Wed, 21 Sep 2011 16:48:02 GMT

This webinar will present advanced chip design methods and practices that are now essential for any medical FPGA or ASIC design project.