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DK Design Suite

Handel-C™ to FPGA for Algorithm Design

DK Design Suite - Handel-C™ offers a software flow for algorithm development, optimization and acceleration in embedded systems. Validate performance and improve product quality in less time and with lower cost.

The DK Design Suite is well suited for algorithm designers using C and C++, requiring a faster validation platform then a processor oriented platform (ie laptop), but don’t have in-depth HW design tool experience to utilize the parallel logic in FPGA prototyping hardware.

Algorithms define the value of today’s embedded systems. These complex models determine the function and performance of end products. Runtimes resulting from classic SW compilation to a CPU may not be fast enough. Verification of real world I/O interaction may be required to determine algorithm exactness and functionality. The DK Design suite offers a solution to the latter by compiling the algorithm directly to dedicated FPGA boards to accelerate system performance while providing tools for debug and optimization.

The DK Design Suite provides a software flow for compilation of algorithms onto FPGA boards. For algorithm design teams, Handel-C enables FPGA programming using software-based tools and flows. Users can verify systems in cycle-accurate simulations, and compile code directly into FPGA logic, creating bit files to program FPGA boards. API libraries allow software designers to connect processors and board peripherals to the FPGA logic, enabling rapid exploration of HW and SW implementation trade-offs. The end result is an “algorithm workbench” enabling rapid system implementation from software to FPGA hardware platforms.

Who: The DK Design suite is well suited…

The DK Design Suite is well suited for algorithm designers using C and C++, requiring a faster validation platform then a processor oriented platform (i.e. laptop), but don’t have in-depth HW design tool experience to utilize the parallel logic in FPGA prototyping hardware.

Why: Algorithms define the value…

Algorithms define the value of today’s embedded systems. These complex models determine the function and performance of end products. Run times resulting from classic SW compilation to a CPU may not be fast enough. Verification of real world I/O interaction may be required to determine algorithm exactness and functionality. The DK Design suite offers a solution to the latter by compiling the algorithm directly to dedicated FPGA boards to accelerate system performance while providing tools for debug and optimization.

What: The DK Design suite provides a …

The DK Design Suite provides a software flow for compilation of algorithms onto FPGA boards. For algorithm design teams, Handel-C enables FPGA programming using software-based tools and flows. Users can verify systems in cycle-accurate simulations, and compile code directly into FPGA logic, creating bit files to program FPGA boards. API libraries allow software designers to connect processors and board peripherals to the FPGA logic, enabling rapid exploration of HW and SW implementation trade-offs. The end result is an “algorithm workbench” enabling rapid system implementation from software to FPGA hardware platforms.

Features & Benefits

  • Complete software design flow from Handel-C to FPGA prototype
  • Fastest path to algorithm implementation
  • Short turn-around for algorithm prototypes
  • Seamless integration with supported FPGA development hardware
  • Direct synthesis from Handel-C to Altera and Xilinx FPGAs

  • Exploits architecture specific features of FPGA
  • Data Streaming Manager facilitates partitioning and interface between embedded processors and FPGA hardware
  • Source code profiling with time/area estimates for optimization
  • Full integrated with RC platforms to create “algorithm workbench”

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Product Update

Since DK was acquired by Mentor, product development of DK has been enhanced with regularly scheduled major releases and point releases that include:

  • Major feature enhancements include cycle accurate simulation integration with ModelSim
  • New device support for Xilinx and Altera devices are available
 
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