Explore the True Potential of Your FPGA Design
On-demand Web Seminar
Abstract
In this seminar, you’ll discover how to leverage FPGA Precision Synthesis technology to find the true potential of your design.
Duration: 19:27
Details
Overview
FPGA designs are growing larger and more complex. What was once a push-button operation to obtain high-quality results from FPGA synthesis and Place & Route tools now requires expert knowledge. Finding the exact combination of settings and options to use on each design can prove time consuming, with endless runs of trial and error, yet choosing the wrong settings can cause dramatic effects on your design.
What about multiple mathematical operators, memory elements, or DSP components? Each of these design elements can also be implemented differently, affecting design performance and utilization.
With a commitment to continually improve design results for each new FPGA design, Mentor Graphics’ Precision® Synthesis now includes technology to help designers find the optimal implementation strategies.
In this seminar, you’ll discover how to leverage FPGA Precision Synthesis technology to find the true potential of your design.
What You Will Learn
- Current obstacles to achieving best results for FPGA Design
- Mentor’s new technology for design exploration that will improve performance and utilization
About the Presenters
Roger Do
Roger Do is Synthesis Product Specialist at Mentor Graphics. He has over 16 years of FPGA experience, including previous roles in corporate and field applications and product marketing with Texas Instruments, Lucent Technologies, and Lattice Semiconductor. Roger holds a B.S. in Electrical Engineering from Texas A&M University.
Rakesh Jain
Rakesh Jain is a Product Manager at Mentor Graphics. He has over 15 years of ASIC & FPGA experience, including previous roles in product & technical marketing, business development, corporate applications and hardware design with Apple, Altera, Synopsys and Chameleon Systems. Rakesh holds an M.S. in Electrical Engineering from Stanford University.
Who Should View
- FPGA designers
- Design engineers
- Engineering managers
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