Formal Verification of Advanced FPGA Synthesis Optimizations
Requires Flash Player.
This webinar will introduce a new FPGA synthesis integrated design flow for logic equivalency checking formal verification.
Duration: 24:05
Products: Precision Physical, Precision RTL, Precision RTL Plus
View On-demand Web Seminar (Opens in New Window/External URL)
Details
Overview
This webinar will introduce a new FPGA synthesis integrated design flow for logic equivalency checking formal verification.
Formal verification is a complimentary method of design verification to traditional RTL and gate-level functional verification. Formal verification has been used widely in ASIC design, but FPGA logic structures pose a more complicated problem. New design flow integrations between synthesis and formal verification tools can now support advanced FPGA synthesis optimizations and design assurance methods such as fault tolerant FSM encoding and TMR insertion.
Who Should View
- Designers
- Design Managers
- Program Managers
On-Demand Web Seminar Series
FPGA - PRECISION RTL PLUS
When designing for programmable logic in Mil-Aero and safety-critical applications, hardware engineers must make special considerations for the safety and operability of the overall system. This series introduces new design assurance tools and features that give FPGA designers the control to adequately guard against design faults, preserve design functionality, and track design requirements through the synthesis and place & route flow.
Related Resources
Multimedia
Introducing Precision RTL Plus + LeonardoSpectrum
Precision RTL Plus + LeonardoSpectrum provides a safe transition to state of the art synthesis Precision RTL Plus while preserving backward compatibility for legacy projects.…View Technology Overview
FPGA Design Assurance for DO-254 and Safety-Critical Applications
Methodologies, tools, and flows for processes such as design synthesis for FPGAs must take DO-254 or design assurance requirements into consideration if the end products are slated for safety-critical applications....…View On-demand Web Seminar
Is Your Safe Design Safe Enough
In this seminar, we explore the causes of soft errors such as SEUs and SETs and consider FPGA challenges when meeting safety-critical standards such as DO-254.…View On-demand Web Seminar
Other Related Resources
Introduction to Precision Hi-Rel
Technology Overview: This overview discusses Precision Hi-Rel, a new product offering radiation effects mitigation for aerospace & high reliability applications. Developed under the guidance of NASA, Precision Hi-Rel automatically...…View Technology Overview
Enabling Model-Based Design for DO-254 Compliance with MathWorks and Mentor Graphics Tools
White Paper: DO-254 compliance is becoming increasingly common on commercial and military aviation projects. Companies often struggle with the requirements and costs of DO-254 compliance. Engineers can use Model-Based...…View White Paper
The Pivot Point for Design Flow Improvements
White Paper: Due to its placement at the junction between design creation and physical implementation, FPGA synthesis can provide significant leverage in meeting quality goals and reducing project cost and time. For...…View White Paper