How to Verify Rad-Tolerant Mitigation Circuitry
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Once you’ve implemented rad-tolerant circuitry into your FPGA design, how do you verify that functionality is preserved? And how do you verify that the mitigation scheme actually works? Attend this session to learn about various methodologies and tool flows to implement rad-tolerant circuitry, automatically verify that design functionality is preserved, and verify the effectiveness of the mitigation schemes.
Duration: 24:30
Products: FormalPro, Precision Hi-Rel
View On-demand Web Seminar (Opens in New Window/External URL)
Details
Overview
Once you’ve implemented rad-tolerant circuitry into your FPGA design, how do you verify that functionality is preserved? And how do you verify that the mitigation scheme actually works? Attend this session to learn about various methodologies and tool flows to implement rad-tolerant circuitry, automatically verify that design functionality is preserved, and verify the effectiveness of the mitigation schemes.
What You Will Learn
- Considerations when verifying rad-tolerant circuitry
- How to automatically mitigate a circuit and verify design functionality
- Methodologies to verify effectiveness of mitigation schemes
About the Presenter
Roger Do
Roger Do is Synthesis Product Specialist at Mentor Graphics. He has over 16 years of FPGA experience, including previous roles in corporate and field applications and product marketing with Texas Instruments, Lucent Technologies, and Lattice Semiconductor. Roger holds a B.S. in Electrical Engineering from Texas A&M University.
Who Should View
- FPGA Designers of high reliability or aerospace applications
- Design Managers
- Program Managers
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