Is Your Safe Design Safe Enough
On-demand Web Seminar
Abstract
In this seminar, we explore the causes of soft errors such as SEUs and SETs and consider FPGA challenges when meeting safety-critical standards such as DO-254.
Duration: 42:47
Details
Overview
In this webinar, we explore the causes of soft errors such as SEUs and SETs and consider FPGA challenges when meeting safety-critical standards such as DO-254.
What You Will Learn
- The sources of soft errors and radiation upsets in FPGAs
- Susceptibility of different FPGA architectures
- New technologies to protect against SEUs and SETs
- Methodologies to meet safety critical standards
About the Presenter
Roger Do
Roger Do is Synthesis Product Specialist at Mentor Graphics. He has over 16 years of FPGA experience, including previous roles in corporate and field applications and product marketing with Texas Instruments, Lucent Technologies, and Lattice Semiconductor. Roger holds a B.S. in Electrical Engineering from Texas A&M University.
Who Should View
- FPGA Designers of high reliability or aerospace applications
- Design Managers
- Program Managers
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