Sign In
Forgot Password?
Sign In | | Create Account

ReqTracer + HDL Designer

Details

Overview

As FPGA and ASIC complexities escalate and the ramifications of project failure become more severe, the need for new design techniques becomes more critical. New design techniques are required not only to describe today’s large designs, but to aid in verification, implementation, reusability, reliability, agility and management, while also reducing project risk. By taking a design approach that is requirements driven and well integrated from design creation through implementation, the project-efficiency, productivity, predictability and final chip quality will dramatically improve. This webinar will present advanced chip design methods and practices that are now essential for any design project.

What You Will Learn

  • How a requirements driven design approach improves the quality, efficiency, and predictability of your chip design projects
  • That designing to requirements will ensure functional assurance and verification closure
  • That a structured and repeatable design process is good design practice and facilitates regulatory mandates compliance
  • Techniques that enhance design reuse and deliver easy documentation

About the Presenter

Presenter Image Valerie Rachko

Marketing Director, Design Creation

Valerie Rachko is the director of HDL & ESL design creation marketing at Mentor Graphics Corporation in Wilsonville, Oregon. Rachko has been marketing HDL design products for Mentor Graphics since 1990, ranging from creation, analysis, reuse, checking, verification, synthesis, and design management, with recent expansion into OVM and ESL. She holds Bachelor of Science and Master of Science degrees in electrical engineering from Fairleigh Dickinson University, USA, graduating in both with summa cum laude honors. She also is magma cum laude Master of Business Administration in marketing graduate from Seton Hall University, USA. Prior to joining Mentor Graphics, she was an ASIC designer for over five years.

Who Should View

  • FPGA/ASIC Project Leads
  • FPGA/ASIC Designer Engineers
  • Engineering Managers
  • Documentation/Information Developers

Related Resources

Multimedia

Other Related Resources

 
Online Chat