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ReqTracer + HDL Designer for Medical Applications



This webinar will present advanced chip design methods and practices that are now essential for any medical FPGA or ASIC design project.

The advancements in FPGA and ASIC geometries are enabling greater applications of these devices in the medical industry for implantable devices, portable equipment, surgical tools, and diagnostic and treatment machines. However, the hardware design processes of these devices are not under strict design control regulations. So how can you ensure that your device is designed so that it functions the way you intend it to and will not fail, or even worse, cause injuries or fatalities?

New design techniques coupled with a good design process can help you to reach your desired level of design assurance while also reducing project risk. By taking a design approach that is requirements driven and well integrated from design creation through device implementation, the project’s efficiency, productivity, predictability and final chip quality will dramatically improve.

What You Will Learn

  • How a requirements driven design approach improves the quality, efficiency, and predictability of your chip design projects
  • That designing to requirements will ensure functional assurance and verification closure
  • That a structured and repeatable design process is good design practice and facilitates regulatory mandates compliance
  • Techniques that enhance design reuse and deliver easy documentation

About the Presenter

Presenter Image Valerie Rachko

Marketing Director, Design Creation

Valerie Rachko is the director of HDL & ESL design creation marketing at Mentor Graphics Corporation in Wilsonville, Oregon. Rachko has been marketing HDL design products for Mentor Graphics since 1990, ranging from creation, analysis, reuse, checking, verification, synthesis, and design management, with recent expansion into OVM and ESL. She holds Bachelor of Science and Master of Science degrees in electrical engineering from Fairleigh Dickinson University, USA, graduating in both with summa cum laude honors. She also is magma cum laude Master of Business Administration in marketing graduate from Seton Hall University, USA. Prior to joining Mentor Graphics, she was an ASIC designer for over five years.

Who Should View

  • FPGA/ASIC Project Leads
  • FPGA/ASIC Designer Engineers
  • Engineering Managers
  • Documentation/Information Developers

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