Industry Articles
January 2012
Six Ways Synthesis Can Support Design Assurance in FPGAs
June 2011
A Third Way in FPGA Development
Automating Radiation Effects Mitigation with FPGA Synthesis
July 2010
Mentor Graphics and EnSilica partner on FPGA IP platform
June 2010
Requirements tracing tools can manage legacy systems, too
November 2008
Minimizing the Pain of RTL Design Reviews
October 2008
Tool Integration for ESL Design
June 2008
Implementing a Team Design Environment
May 2008
How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 2
April 2008
How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 1
How To Implement SystemVerilog for FPGA Design
March 2008
Freedom of Choice is Key for FPGA Design Projects
February 2008
SystemVerilog is Coming to FPGA Design
January 2008
Three “I”s of FPGA Design: Iterations, Incremental and Intelligent Design Tools
December 2007
New Approach to FPGA Physical Synthesis for Ease-of-Use and Wide Device Support
November 2007
October 2007
Duct Tape, FPGAs, and the Art of Making Great Multi-Purpose Tools
September 2007
August 2007
The Need for Incremental FPGA Synthesis
July 2007
How to enable Microsoft Office and Visio for RTL design
June 2007
Accelerating DO-254 for ASIC/FPGA designs
May 2007
The Need for an FPGA Resource Manager
The Value of a Complete FPGA Design Flow
March 2007
Deterministic Name Generation for Incremental Synthesis
February 2007
Making FPGA Synthesis Physically Aware
The Importance of Design Analysis in FPGA Synthesis
Getting the most out of ASIC prototyping with FPGAs
December 2006
Precision is better & at 1/3 price of Synplicity
November 2006
Mentor offers synthesis support for Stratix III
October 2006
Enhanced tool suite supports Lattice's 90-nm FPGAs
How to utilize advanced FPGA features without getting locked into an architecture
September 2006
FPGAs Ride Tools Into ASIC Territory
ASIC Prototyping with FPGAs - YES, Please!
June 2006
May 2006
Time for a Change: Mentor Modernizes the ECO
The Real Story behind FPGA-Based Quality-of-Results (QoR)
April 2006
January 2006
Optimizing DSP functions in advanced FPGA architectures
December 2005
A practical approach to reusing HDL code in FPGA designs
Mentor, QuickLogic Integrate FPGA Synthesis
QuickLogic and Mentor in OEM agreement on FPGA tools
How to use register retiming to optimize your FPGA designs
November 2005
FPGA Design Meets the Heisenberg Uncertainty Principle
October 2005
QuickLogic Lowest-Power FPGAs Supported by Precision Synthesis From Mentor Graphics
A Good Methodology Helps Design Teams Check RTL Code
Programmable logic: Understanding the risks in military and aerospace applications
May 2005
EDA Alert e-Newsletter: Simon Bloch viewpoint on mentor.com
June 2004
FPGA Go, Go, Go: Solving the FPGA timing closure challenge for high-speed designs, Chip Design
Head2Head: FPGA Pricing, Chip Design
May 2004
ModelSim Enables Rapid Prototyping of VeriWave Wireless LAN Test Equipment
December 2003
FPGA Press Releases
- Mentor Graphics Announces Logic and Physical Synthesis Support for Xilinx 7 Series FPGAs (Mar 8, 2011)
- Mentor Graphics DO-254 Platform Adopted by the Civil Aviation University of China (CAUC) (Sep 13, 2010)
- Mentor Graphics Announces New FPGA Synthesis Innovation in Precision Synthesis 2010a Release (May 20, 2010)
- Mentor Graphics Extends DO-254 Platform Offering with Enhanced HDL Coding Standards (Apr 13, 2010)
- Mentor Graphics ReqTracer Automates Requirements Tracking and Reporting for Broad Range of Electronic Design Projects (Apr 5, 2010)
- The MathWorks and Mentor Graphics Outline Joint Workflow for Model-based Design (Mar 23, 2010)
- Mentor Graphics and Aeroconseil Partner to Support DO-254 in China (Oct 15, 2009)
- Mentor Graphics Launches Precise-IP Vendor-independent IP Platform for FPGA Design (Sep 3, 2009)
- Mentor Graphics Announces Logic and Physical Synthesis Support for Xilinx Virtex-6 and Spartan-6 FPGAs (Jun 24, 2009)