IP Reuse for FPGA Design
White Paper
ABSTRACT
Reusing internal designs and incorporating commercial IP can help you quickly complete designs. However, some of this efficiency is lost if you are spending your design time unraveling this IP in order to discover its completeness and accuracy. This paper discuses a methodology to quickly complete the IP discovery process, enhanced through the use of FPGA Advantage.
Related Resources
Understanding electronic IP: common issues and how to find them
Using IP blocks in designs requiring DO-254 compliance is becoming more popular as a way to reduce costs and schedules. However, the use of IP comes with its own problems and pitfalls. A good methodology...
Embedding HDL Design Expertise to Improve First...
On-demand Web Seminar 31:33Embedding HDL Design Expertise to Improve First Pass Success Rate
Watch this presentation to learn how to analyze and develop higher quality HDL code using HDL Designer. The session introduces a number of concepts such as design checking, analysis, code reviews and visualization...
Automated Design Checking to Ensure Consistent RTL...
On-demand Web Seminar 24:29Automated Design Checking to Ensure Consistent RTL Quality
Design teams often have specific coding guidelines to ensure a level of consistency that needs to be enforced because RTL coding style and quality can vary greatly amongst engineers and can become both...