White Papers - FPGA
Dynamic Clock Disable in PolarPro Devices
More White Papers
Using Assertions to Satisfy Elemental Analysis
This paper discusses DO-254 and what it requires for verification (including advanced methods for DAL A/B designs), explains the original intent of Elemental Analysis, the way it is typically satisfied today with code coverage, introduces ABV, and proposes a method for using this technique to not only satisfy Elemental Analysis but also to support a systematic approach to satisfying a claim of Robustness testing.
Using FPGA Synthesis to Protect Against Radiation Effects and Soft Errors
Mentor Graphics Precision® Hi-Rel automatically incorporates advanced mitigation circuitry during device-neutral RTL synthesis, thereby providing additional protection through the implementation flow itself. With support for SRAM, flash and antifuse architectures, this new technology can accelerate the development schedule, expand device options and reduce production cost.
Understanding electronic IP: common issues and how to find them
Using IP blocks in designs requiring DO-254 compliance is becoming more popular as a way to reduce costs and schedules. However, the use of IP comes with its own problems and pitfalls. A good methodology to better screen this IP before its usage can significantly reduce unexpected problems and lower risk, especially on safety critical designs. The most important soft IP screening technologies are automatic formal check and clock domain crossing analysis. This paper will provide a background explanation of IP, including: what types exist in the market; caveats to their usage; and suggestions to better analyze IP before it is used in a design, thus lowering risk and improving product safety. (Note: This paper does not address IP compliance issues. For more information on that topic, please refer to the DO-254 User Group paper "Use of Intellectual Property (IP) Cores in Airborne Electronic Hardware".
Best practice development processes for medical device FPGAs
For FPGA developers working on designs for medical devices, one approach to dealing with regulatory uncertainty is to borrow heavily from design assurance processes in other safety-critical industries, such as avionics, where standards are well established. These well-established standards mandate a development flow that is controlled, auditable and perhaps most important, specific to the requirements of hardware engineering. While following such a flow will not guarantee smooth sailing though every regulatory approval process for FPGA devices bound for medical applications, it is consistent with basic regulatory intent – to demonstrate to auditors that complex devices meet their requirements and perform well under all foreseeable conditions.
FPGA Synthesis for High Assurance Design (Including DO-254).
Updated for 2011, this paper provides background information and also goes into detail on FPGA synthesis challenges and solutions in high assurance design, including DO-254 environments.
Indeed, DO-254 is just one of many new or emerging standards among the safety- and mission-critical (or high assurance) design domains. Military, automotive, space, medical, nuclear, transportation, and industrial segments all have similar standards and/or concerns. The key objective of each of these standards is to ensure that the device produced will perform its intended function (as specified by requirements) under all foreseeable conditions. No specific methodologies or tools are inherently certified, compliant or qualified for these types of programs. However, many companies that are concerned about design assurance are reevaluating their design methods and tools – many of which described in this whitepaper – play an important role in overall program compliance, while also affecting productivity, schedule, budget, and design quality.
Rad-Tolerant FPGA Design: An Easier Way
FPGA development teams use a variety of techniques to deal with radiation, such as rad-tolerant silicon, device- or board-level triplication, or HDL-level mitigation. While these are all viable, each technique comes with its own set of tradeoffs. One technology now available automatically incorporates mitigation circuitry during RTL synthesis, thereby addressing radiation protection through the tool flow. This paper first reviews some radiation basics, then examines traditional mitigation strategies commonly used today, and finally outlines how synthesis-based mitigation can offer an easier way to rad-tolerant FPGA design.
Understanding DO-254 and Solutions to Facilitate Compliance
RTCA/DO-254 (also known as DO-254 in the US or ED-80 in Europe) provides guidelines to facilitate requirements-based design of airborne electronic hardware. Now mandated by the US Federal Aviation Association (FAA) and many other aviation agencies and military programs, DO-254 establishes a standard to ensure that airborne custom micro-coded components (i.e., PLD, FPGA, and ASIC devices) perform their intended function under all foreseeable conditions.
First attempts to comply with DO-254 standards can be fraught with delays and unexpected costs. Project managers can minimize these difficulties if they understand what DO-254 compliance really entails, and modify their flows and toolsets to support it.
Understanding and Running DO-254 Coding Checks in HDL Designer
DO-254 discusses the need for "Design Standards" and Order 8110-105 takes this a step further, discussing the specific need for HDL coding standards. Because of this, many companies having to comply with DO-254 are either looking for examples of good standards to use, or recognize that they have insufficient or inconsistent standards and want to improve their approach. A recent initiative launched with the DO-254 Users Group gathered information from 20+ companies on the HDL coding standards that were deemed most applicable for DO-254 design programs. This white paper provides this list of generally accepted HDL design best practice coding guidelines that should be considered for any fail-safe design, including DO-254 programs. It also describes how to automate the checking of these HDL coding standards using the DesignChecker in HDL Designer.
Enabling Model-Based Design for DO-254 Compliance with MathWorks and Mentor Graphics Tools
DO-254 compliance is becoming increasingly common on commercial and military aviation projects. Companies often struggle with the requirements and costs of DO-254 compliance. Engineers can use Model-Based Design for requirements analysis, design, automatic HDL code generation, and verification to produce airborne electronic hardware that adheres to DO-254. Model-Based Design for DO-254 combines automation tools from MathWorks and Mentor Graphics for design and verification to support a development process that goes from concept through implementation. This paper discusses this flow.