White Papers - FPGA
Keep Your FPGA Options Open With Vendor-Independent IP
This white paper introduces and advocates tools that allow designers to create vendor-independent FPGA configurations that can change as new technologies and customer demands emerge. Third-party IP elements such as DSP and processor cores play an important role in today’s FPGA design work, helping FPGA developers meet time-to-market and cost challenges in a competitive world. But relying on the proprietary IP that “came with the FPGA” is a recipe for limited choices in the future.
More White Papers
Understanding electronic IP: common issues and how to find them
Using IP blocks in designs requiring DO-254 compliance is becoming more popular as a way to reduce costs and schedules. However, the use of IP comes with its own problems and pitfalls. A good methodology to better screen this IP before its usage can significantly reduce unexpected problems and lower risk, especially on safety critical designs. The most important soft IP screening technologies are automatic formal check and clock domain crossing analysis. This paper will provide a background explanation of IP, including: what types exist in the market; caveats to their usage; and suggestions to better analyze IP before it is used in a design, thus lowering risk and improving product safety. (Note: This paper does not address IP compliance issues. For more information on that topic, please refer to the DO-254 User Group paper "Use of Intellectual Property (IP) Cores in Airborne Electronic Hardware".
Diagnosing CDC Errors in FPGAs
Clock domain crossing (CDC) errors in FPGAs are elusive, and locating them often requires good detective work and smart design as well as an understanding of metastability and other physical behaviors. This white paper discusses the nature of CDC errors and presents a powerful solution that aids in their detection and removal. You can join the discussion forum on this topic at Mentor Communities.