Mentor Graphics Precision Physical Synthesis Addresses Productivity and Timing Closure Challenges of Complex FPGAs
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WILSONVILLE, Ore., December 1, 2003 - Mentor Graphics Corporation today introduced Precision? Physical Synthesis, the first integrated RTL and physical field-programmable gate array (FPGA) synthesis solution addressing the productivity and timing closure challenges caused by today's highly complex programmable devices. The Precision Physical Synthesis product reduces design iteration times by rapidly achieving performance and design goals with a high degree of predictability. The Precision Physical Synthesis product defines a new approach to FPGA synthesis with an RTL to placed gates solution, built on a single data model, that simultaneously optimizes gate and interconnect delay to shave weeks to months off a product design cycle. The highly productive design environment integrates seamlessly into the comprehensive Mentor Graphics? FPGA tool flow, and is the continuation of a FPGA technology roadmap. "With today's market conditions we have to meet performance and financial goals," said Hans-Joachim Koch, head of product development, Siemens AG Medical Division. "With the Precision Physical Synthesis product we were able to use physical information to drop two required speed grades, without compromising performance. The automated flow was used to quickly drop one speed grade and the PreciseView functionality enabled us to drop another speed grade. The Precision Physical synthesis product proved itself by helping us achieve our aggressive performance and financial goals." Former techniques for achieving timing closure included rewriting RTL or floorplanning, but these approaches have not kept pace with technology and the productivity gap has grown wider and increased the number of design iterations. In previous device generations, gate delay accounted for the large portion of the total delay, but with shrinking process technologies and increasing device size and capacity, interconnect delay can exceed 70 percent of the total delay, requiring new approaches to achieving performance targets. "With FPGA devices approaching one billion transistors and demanding ASIC-like design flows, RTL synthesis alone is no longer sufficient in order to complete designs on schedule," said Simon Bloch, general manager, design creation and synthesis division, Mentor Graphics. "Physical synthesis has become a required design step. It goes beyond the capabilities of existing tools by linking physical, logical and timing domains to significantly reduce design iterations and accelerate timing closure." The Precision Physical Synthesis tool contains advanced RTL synthesis functionality, and enhances these capabilities with physically aware algorithms, such as placement modification, retiming, replication and re-synthesis. The Precision Physical Synthesis product has detailed knowledge concerning the FPGA vendor design rules, and uses this data to improve the quality of results. It verifies that any logic or placement changes are correct. An automated flow uses this level of detail to maximize performance. In addition, the Precision Physical Synthesis product offers designers an interactive environment, called PreciseView, which complies with the vendor rules to further minimize interconnect delay. The highest design performance is now achievable with the lowest possible speed grades. Understanding the sources of performance issues is also key. Using PreciseTime's incremental timing analysis, the user can cross probe between the different design views - RTL, schematic, physical and timing - to clearly identify bottlenecks and determine how to overcome them. Mentor works closely with FPGA vendors, complementing their tools, in order to achieve the highest productivity and best results possible for mutual customers. "Customers must take into account interconnect delays during design and the Precision Physical Synthesis product is an excellent tool to do this," said Tim Southgate, vice president of software and tools marketing at Altera. "The Precision Physical synthesis tool complements the Quartus II environment, helping system level designers identify performance bottlenecks and greatly reduce their overall design iterations." "Considering the physical effects early in the design process, helps our customers hit their market windows," said Dave Bennett, vice president of logical systems software at Xilinx. "We worked very closely with Mentor during their development of the Precision Physical Synthesis tool in order to help our customers realize the fastest overall time to market through improvements in productivity, more predictable schedules, and timing closure with fewer design iterations." Availability About Mentor Graphics FPGA Solutions About Mentor Graphics Mentor Graphics and Precision are registered trademarks of Mentor Graphics Corp. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners. # # #
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