Synopsys Recognizes Mentor Graphics with Tenzing Norgay EDA Interoperability Achievement Award
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DESIGN AUTOMATION CONFERENCE, NEW ORLEANS, Louisiana, June 12, 2002 - - At the 39th Design Automation Conference (DAC) today, Synopsys, Inc., the technology leader for complex integrated circuit (IC) design, presented Mentor Graphics with the second annual Tenzing Norgay EDA Interoperability Achievement Award. Mentor Graphics, an electronic design automation (EDA) provider for software and hardware design solutions, was recognized during the Open Source Interoperability event for its support and promotion of EDA standards that further interoperable design flows. Synopsys established the Tenzing Norgay Interoperability award last year in order to encourage EDA providers to collaborate on interoperable design flows that benefit the user community. The award is presented annually to an EDA company that has surpassed common levels of interoperability, has contributed to overall industry advancement, and has helped provide a new view of the future for EDA interoperability. Mentor was recognized for applying open source standards Liberty™ and Synopsys Design Constraints (SDC) to a broad array of Mentor tools to ensure consistency and interoperability throughout a multi-vendor design flow. Mentor also supports committee-generated standards, and currently chairs the Accellera standards organization. As one of the first licensees of Liberty, even prior to its open source standardization, Mentor demonstrated its willingness to improve EDA interoperability through new methods of standardization. Mentor has also developed unique technical solutions to ensure that the SDC standard guides its tools in a consistent and correct manner. Mentor Graphics encourages adoption of standards throughout the design flow, empowering customers to create the solution of their choice, said Michael Bohm, chief scientist, Mentor Graphics HDL Design division. For example, we see great value in applying Synopsys Design Constraints to the FPGA world. Mentor's Precision Synthesis tool completely supports SDC constructs. We look forward to working with Synopsys to enhance this standard for FPGA design. ASIC designers who use the SDC format can easily migrate to FPGAs without having to recreate their design constraints. By working closely with Mentor and Synopsys to support the SDC format in the FPGA design flow, Altera designers can enjoy enhanced interoperability between FPGA synthesis tools and our Quartus II design environment, said Tim Southgate, vice president of software and tools marketing at Altera Corporation. We encourage all EDA vendors to adopt standard formats such as SDC in their product lines and commend Mentor Graphics and Synopsys for their successful deployment of open standards. For years, Synopsys and Mentor have worked together on standards for the benefit of our customers, said Rich Goldman, vice president, strategic market development at Synopsys and chair, EDA Consortium interoperability committee. Mentor's work towards improving interoperability for mutual customers and semiconductor manufacturers demonstrates that EDA companies can address interoperability cooperatively. I congratulate Mentor on winning the Tenzing Norgay EDA Interoperability Achievement Award. About Mentor Graphics About Synopsys ### Mentor Graphics is a registered trademark and Precision Synthesis is a trademark of Mentor Graphics Corp. All other trademarks are the property of their respective holders.
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