FPGA Design Tools

The integration between Auspy ACE Compiler and Precision Synthesis provide users the capability to produce high-performance prototyping platforms for complex ASIC designs.

Auspy Custom Emulator Compiler (ACE Compiler) maps designs in RTL or gate-level onto the custom-built or commercial prototyping platforms. The proprietary automatic partition algorithm produces high-quality solution with the minimum inter-FPGA connections and timing-correct high-speed prototypes. For more information click here: http://www.auspy.com.

Precision Synthesis is used in the CHIPit ASIC Prototyping platform flow to synthesize RTL designs into a high performance FPGA board system.

The CHIPit line of ASIC Prototyping platforms provide verification and validation throughout the SoC and ASIC project life cycle. Based on the latest FPGA technologies and an integrated set of tools with debug capabilities the modular CHIPit platforms give design engineers unprecedented speed and flexibility to validate algorithm performance, verify hardware implementation, and assist in hardware/software Co-verification to reduce the verification time dramatically. The CHIPit platforms can handle capacities up to 20 million ASIC gates and run at system speeds of up to 200MHz. Over 200 CHIPit systems are installed worldwide at customers including ST Microelectronics, Philips Semiconductors, Thomson Multimedia, Sony Semiconductors and many more. For more information click here: http://www.prodesign-usa.com.