Precision RTL

Intuitive logic synthesis environment with advanced optimization techniques, award-winning timing analysis, and advanced inferencing technology. Precision RTL enables vendor-independent design, accelerates time to market, eliminates design defects and delivers superior quality of results (QoR).

Benefits

• Improves designer efficiency through an intuitive user interface
• Excellent quality of results using advanced optimization techniques
• Incremental-debug and analysis environment identifies and fixes problems early in the design process
• Language neutrality supports any combination of VHDL, Verilog, SystemVerilog and EDIF usage

Features

• High-performance, easy-to-use, vendor-independent RTL synthesis solution
• Powerful RTL and technology schematic views
• Advanced retiming algorithm to improve performance
• Interactive static-timing analysis quickly performs "what-if" timing analysis scenarios
• Gated clock conversion and DesignWare^TM support for ASIC prototyping
• Support for industry standards with SystemVerilog and Synopsys^TM Design Constraints (SDC) format
• Design Bar guides users step by step through synthesis, analysis, placement and routing

Product Overview Details