Functional Verification
The Mentor Functional Verification platform delivers the strongest verification foundation and vision, spanning simulation, emulation, and formal verification to conquer your ever growing verification challenges. Its leading support for open, industry standards, customizability, and scalability ensures an optimized verification flow that is tailored to your needs and achieves the highest productivity, schedule predictability, and rapid verification closure.
Verification Horizons
Verification Horizons provides expert insight and practical knowledge about state-of-the-art functional verification. Verification Horizons
Product Guide
Interactive guide that helps you find the right products for your project. Functional Verification Product Guide
Industry Segments
Mentor’s verification solutions are used across multiple industry segments and across all design and verification activities from design and testbench creation to design analysis, simulation, and management.
Semiconductor & IP
- Processors, DSP
- Graphics Chips/Cores
- Interface Controllers
- Switching Fabric
- Comm. Controllers
- Memory Systems
- Audio/Video Codecs
- Storage Processors
Networking/Data Communication
- Local Area Networking
- Optical Communications
- Storage Solutions
- Broadband Solutions
- Switches/Routers
- Base Stations
- VOIP Solutions
- Storage Processors
Consumer Electronics
- Mobile Phones
- Personal Computers
- Portable Multimedia
- Digital/Mobile TV
- Set Top Boxes
- Still/Video Cameras
- Home Networking
- GPS Systems
Safety/Mission Critical
- Airplane Electronics
- Automotive Control
- Medical Control
- Satellite Systems
- Mil/Aero Solutions
- Industrial Electronics
Resources
Functional Verification White Papers
Mentor Graphics has a large library of in-depth technical papers that you can download at your leisure. FV White Papers
Multimedia
Our rich set of recorded webinars and product demonstrations can help you be more successful with our products. Multimedia
Low Power Solutions
These days everyone is concerned about power consumption. And while you’d like to tackle power as early in the design process as possible, at the end of the day it’s about balancing power with existing requirements of system functionality, performance, and manufacturability.
The Unified Power Format (UPF) provides the backbone to our low power technologies so engineers can define power based architectures, create power aware strategies, and verify low power designs throughout the TLM to GDSII flow.
From the Blogs
Making formal property checking easy to use
blog post: For years one of the objectives in EDA has been to make formal property checking easy to use and its results easy to understand. With the Automatic formal check feature in the June release of the 0-In Formal…View Blog Post
Redefining Verification Performance (Part 1)
blog post: What does the word performance mean to you?
Speed? Well, obviously speed is an important characteristic. Yet, if the team is running in the wrong direction, it really doesn’t matter how fast they are going.
How…View Blog Post
SystemVerilog Coding Guidelines: Package import versus `include
blog post: Another frequently asked question: Should I import my classes from a package or `include them? To answer this properly, you need to know more about SystemVerilog’s type system, especially the difference…View Blog Post
News and Press
- Mentor Graphics Questa Functional Verification Platform Adopted by Mindtree Ltd.
- Mentor Graphics Underscores Support for OVM and Extends That Support to UVM Across Multiple Products
- Mentor Graphics Receives Supply Support Award from Huawei Technologies for Achievements Related to Veloce Emulation Products
- More