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Verification Horizons Blog

Posts tagged with 'DASC'

5 Dec, 2012

Dennis Brophy IEEE Std. 1800™-2012 Officially Ratified The IEEE Standards Association (SA) Standards Board (SASB) officially approved the latest SystemVerilog revision, Draft 6, as an IEEE standard.  The SASB Review Committee (RevCom) agenda and the SASB agenda include review and formal approval of the latest work by the IEEE Computer Society Design Automation Standards Committee’s (DASC) SystemVerilog Working Group … Read More

Muttiple Inheritance, RevCom, Assertions, Tom Fitzpatrick, UVM, Ben Cohen, Soft Constraints, Hard Constraints, IEEE SASB, Stu Sutherland, DASC, DVCon

18 Dec, 2009

Dennis Brophy Just in time for the holidays!  IEEE Std. 1800™-2009, aka SystemVerilog 2009, is ready for purchase and download from the IEEE.  The standard was developed by the SystemVerilog Working Group and recently approved by the IEEE.  It is an entity project of the IEEE jointly sponsored by the Corporate Advisory Group (CAG) and the Design Automation Standards Committee (DASC).  The working group members … Read More

CAG, 1364, Verilog, PLI, VPI, DASC, DPI

7 Dec, 2009

Dennis Brophy Congratulation Peter! At the December 5, 2009 IEEE SA Awards Ceremony, the “Ron Waxman Design Automation Standards Committee (DASC) Meritorious Service” award was presented to Dr. Peter Ashenden.  He was recognized for “leadership in keeping the Design Automation standards Committee on the path to technical and organizational excellence during its formative years.” While many who may use VHDL might … Read More

DASC, VHDL

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