Sign In
Forgot Password?
Sign In | | Create Account

Blog

Posts tagged with 'Emulation'

25 Feb, 2014

More DVCon–More Mentor Tutorials!

Posted by Dennis Brophy

Dennis Brophy As DVCon expands, we at Mentor Graphics have grown our sponsored sessions as well.  Would you expect less? In DVCon’s recent past, it was a tradition for the North American SystemC User Group (NASCUG) to sponsor a day of activity before the official start of the conference.  When OSCI merged with Accellera, the day before the official conference start grew to become Accellera Day with a broader set … Read More

DVCon, Emulation, Accellera, SystemC, Formal Verification, fpga prototype

4 Oct, 2013

Harry Foster We are truly living in the age of SoC design, where 78 percent of all designs today contain one or more embedded processors.  In fact, 56 percent of all designs contain two or more embedded processors, which brings a whole new level of verification challenges—requiring unique solutions. A great example of this is STMicroelectronics who recently shared their experience and solution in addressing verification … Read More

OVM, Emulation, UVM, SystemC

26 Jul, 2013

Mark Olen You don’t need a graphic like the one below to know that multi-core SoC designs are here to stay.  This one happens to be based on ARM’s AMBA 4 ACE architecture which is particularly effective for mobile design applications, offering an optimized mix of high performance processing and low power consumption.  But with software’s increasing role in overall design functionality, verification engineers … Read More

Intelligent Testbench Automation, iTBA, Emulation, Verification Academy, Verification Methodology, Verification

26 Jul, 2012

Virtual Emulation for Debugging

Posted by Mark Olen

Mark Olen A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According to him there was just no way around consuming emulators while debugging their SoC design emulation runs. In fact when failures occur during emulation, verification engineers often turn to live debugging with JTAG interfaces to the Design Under Test. This enables … Read More

Functional Verification, Instant Replay, Emulation, Verification, Verification Academy, JTAG, SoC

26 Jun, 2011

Harry Foster

Verification Techniques & Technologies Adoption Trends This blog is a continuation of a series of blogs, which present the highlights from the 2010 Wilson Research Group Functional Verification Study (for a background on the study, click here). In my previous blog (Part 8 click here), I focused on some of the 2010 Wilson Research Group findings related to design and verification language trends.

Read More

Emulation, testbench, Functional Verification, Formal Verification

Tags

Archives

 
Online Chat