Sign In
Forgot Password?
Sign In | | Create Account

Verification Horizons Blog

Posts tagged with 'Formal'

20 Jul, 2012

Dennis Brophy Live & In-Person at DAC 2012! Verification Academy, the brain child of Dr. Harry Foster, Chief Verification Scientist at Mentor Graphics, was live from the Design Automation Conference tradeshow floor this year.  Harry is pictured to the right giving an update on his popular verification survey from the DAC tradeshow floor. The Verification Academy, predominantly a web-based resource is a popular … Read More

Formal, Doulos, Verification Academy, UVM Express, Verification Trends, Tech Design Forum, ACE, Thales, AMS, UPF, ABV, UVM, Coverage Closure, iTBA, DAC, Low Power, ARM, OVM, Assertion-Based Verification

7 Jun, 2010

Static Verification

Posted by Ping Yeung

Ping Yeung After spending years verifying ASICs with dynamic simulation, I started working on static verification 10 years ago in a startup called 0-In Design Automation. I firmly believe that static verification can complement dynamic simulation. Static verification uses synthesis and formal technologies to find bugs in the design. It does not rely on simulation stimulus. You do not need to exercise the bugs, … Read More

Assertion-Based Verification, CDC, 0-In, DAC, Formal

Archives

 
Online Chat