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Posts tagged with 'SoC Verification'

Emulation 104 -- Running More Tests in Less Time

Posted Mar 8, 2010, by Ralph Zak

In an earlier blog I talked about the value of emulation in terms of providing direct project cost and schedule reductions that generally dwarf the actual costs of emulation systems. I have been asked by some to provide a “prequel” discussion, with a higher level description of the SoC verification problem and how emulation systems address verification challenges. Rather than trying to cover the … Read More

Tags: SoC Verification, Emulation, FPGA Boards, ASIC Emulation, SoC Emulation, SoC Simulation, FPGA Systems, Simulation Acceleration

Emulation 103--Accelerating Transaction-based Verification

Posted Oct 7, 2009, by Ralph Zak

Transaction-Based Verification is a technique for verifying modern SoC designs with interfaces such as PCI express, using test benches at the transaction level of abstraction. Transaction-based verification complements directed and constrained random tests, and is an emerging methodology for verifying complex SoCs that have multiple on-chip standard bus and peripheral interfaces. Typically in a transaction-based … Read More

Tags: TBV, System on Chip, Transaction-Based Verification, Emulation, FPGA Prototyping, ASIC Emulation, SoC, SoC Verification, Simulation Server Farms

Emulation 102 – Emulation ROI – How can you not to invest in Emulation methodology?

Posted Aug 14, 2009, by Ralph Zak

In my last blog I stated I was an evangelist for using emulation to verify SoC designs. I defined Emulation Systems as verification systems which provide (1) Vector and transaction-based simulation acceleration and (2) in-circuit emulation (ICE) capability to perform system integration and test using real world data before silicon is available. Emulation systems are typically built on custom emulation … Read More

Tags: Emulation, Functional Verification, FPGA Prototyping, System Verilog, VMM, OVM, SoC Verification