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Posts tagged with 'System Verilog'

Emulation 102 – Emulation ROI – How can you not to invest in Emulation methodology?

Posted Aug 14, 2009, by Ralph Zak

In my last blog I stated I was an evangelist for using emulation to verify SoC designs. I defined Emulation Systems as verification systems which provide (1) Vector and transaction-based simulation acceleration and (2) in-circuit emulation (ICE) capability to perform system integration and test using real world data before silicon is available. Emulation systems are typically built on custom emulation … Read More

Tags: Emulation, Functional Verification, FPGA Prototyping, System Verilog, VMM, OVM, SoC Verification