Posts tagged with 'tracing'
Posted by Russ Klein
As Yogi Berra once said, “It’s déjà vu, all over again.”
I was out at a customer helping them debug a multi-core system. Unlike my Sudoku solver, this was not a multi-threaded SMP application. The customer had 4 processes, each running on a different core and specifically tied to that core. While all the programs were running under the same operating system – the designer did not rely on the OS … Read More
RT @CalyptoDesign: Read Shawn McCloud's article "Raising the Bar for Power Optimization" in Chip Design. #DAC50 #Power #EDA #SemiEDA http:/… 6:30 AM May 18
RT @dave_59: What's the deal with those wire's and reg's in #Verilog and #SystemVerilog. http://t.co/520olnyog4 6:26 AM May 18
What's the deal with those wire's and reg's in #Verilog and #SystemVerilog. http://t.co/520olnyog4 7:20 AM May 13
My DAC moment http://t.co/LA5S97gDQU #SemiEDA #Verilog 2:57 PM May 9
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